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Wed, 22 Jan 2020 03:27:56 -0800 (PST) Date: Wed, 22 Jan 2020 12:27:51 +0100 From: Jean-Philippe Brucker To: Rob Herring Subject: Re: [PATCH] iommu/arm-smmu-v3: Batch ATC invalidation commands Message-ID: <20200122112751.GA635551@myrica> References: <20200113143906.11121-1-robh@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200113143906.11121-1-robh@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200122_032758_997430_A7CDE59D X-CRM114-Status: GOOD ( 18.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robin Murphy , iommu@lists.linux-foundation.org, Will Deacon , Joerg Roedel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, On Mon, Jan 13, 2020 at 08:39:06AM -0600, Rob Herring wrote: > Similar to commit 2af2e72b18b4 ("iommu/arm-smmu-v3: Defer TLB > invalidation until ->iotlb_sync()"), build up a list of ATC invalidation > commands and submit them all at once to the command queue instead of > one-by-one. > > Cc: Jean-Philippe Brucker > Cc: Will Deacon > Cc: Robin Murphy > Cc: Joerg Roedel > Signed-off-by: Rob Herring > --- > drivers/iommu/arm-smmu-v3.c | 23 +++++++++++++++++++---- > 1 file changed, 19 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index effe72eb89e7..e91b4a098215 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -1919,10 +1919,11 @@ static int arm_smmu_atc_inv_master(struct arm_smmu_master *master, > static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, > int ssid, unsigned long iova, size_t size) > { > - int ret = 0; > + int i, cmdn = 0; > unsigned long flags; > struct arm_smmu_cmdq_ent cmd; > struct arm_smmu_master *master; > + u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS]; > > if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_ATS)) > return 0; > @@ -1947,11 +1948,25 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, > arm_smmu_atc_inv_to_cmd(ssid, iova, size, &cmd); > > spin_lock_irqsave(&smmu_domain->devices_lock, flags); > - list_for_each_entry(master, &smmu_domain->devices, domain_head) > - ret |= arm_smmu_atc_inv_master(master, &cmd); It may be worth reworking arm_smmu_atc_inv_master() as well since it's now only called by arm_smmu_disable_ats() to invalidate the whole ATC. I don't think it requires batching (it's not on any fast path and num_sids will almost always be 1), but it doesn't need the cmd argument anymore. Thanks, Jean > + list_for_each_entry(master, &smmu_domain->devices, domain_head) { > + if (!master->ats_enabled) > + continue; > + > + for (i = 0; i < master->num_sids; i++) { > + if (cmdn == CMDQ_BATCH_ENTRIES) { > + arm_smmu_cmdq_issue_cmdlist(smmu_domain->smmu, > + cmds, cmdn, false); > + cmdn = 0; > + } > + > + cmd.atc.sid = master->sids[i]; > + arm_smmu_cmdq_build_cmd(&cmds[cmdn * CMDQ_ENT_DWORDS], &cmd); > + cmdn++; > + } > + } > spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); > > - return ret ? -ETIMEDOUT : 0; > + return arm_smmu_cmdq_issue_cmdlist(smmu_domain->smmu, cmds, cmdn, true); > } > > /* IO_PGTABLE API */ > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel