From: Andrew Murray <andrew.murray@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v4 2/3] KVM: arm64: limit PMU version to ARMv8.4
Date: Thu, 23 Jan 2020 11:58:51 +0000 [thread overview]
Message-ID: <20200123115852.55595-3-andrew.murray@arm.com> (raw)
In-Reply-To: <20200123115852.55595-1-andrew.murray@arm.com>
ARMv8.5-PMU introduces 64-bit event counters, however KVM doesn't yet
support this. Let's trap the Debug Feature Registers in order to limit
PMUVer/PerfMon in the Debug Feature Registers to PMUv3 for ARMv8.4.
Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/include/asm/sysreg.h | 5 +++++
arch/arm64/kvm/sys_regs.c | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 6e919fafb43d..d969df417f88 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -672,6 +672,11 @@
#define ID_AA64DFR0_TRACEVER_SHIFT 4
#define ID_AA64DFR0_DEBUGVER_SHIFT 0
+#define ID_DFR0_PERFMON_SHIFT 24
+
+#define ID_DFR0_EL1_PMUVER_8_4 5
+#define ID_AA64DFR0_EL1_PMUVER_8_4 5
+
#define ID_ISAR5_RDM_SHIFT 24
#define ID_ISAR5_CRC32_SHIFT 16
#define ID_ISAR5_SHA2_SHIFT 12
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 9f2165937f7d..028c93a88a51 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1085,6 +1085,17 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
(0xfUL << ID_AA64ISAR1_API_SHIFT) |
(0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
(0xfUL << ID_AA64ISAR1_GPI_SHIFT));
+ } else if (id == SYS_ID_AA64DFR0_EL1) {
+ /* Limit guests to PMUv3 for ARMv8.4 */
+ val = cpuid_feature_cap_signed_field_width(val,
+ ID_AA64DFR0_PMUVER_SHIFT,
+ 4, ID_AA64DFR0_EL1_PMUVER_8_4);
+ } else if (id == SYS_ID_DFR0_EL1) {
+ /* Limit guests to PMUv3 for ARMv8.4 */
+ val = cpuid_feature_cap_signed_field_width(val,
+ ID_DFR0_PERFMON_SHIFT,
+ 4, ID_DFR0_EL1_PMUVER_8_4);
+
}
return val;
--
2.21.0
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next prev parent reply other threads:[~2020-01-23 11:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-23 11:58 [PATCH v4 0/3] arm64: perf: Add support for ARMv8.5-PMU 64-bit counters Andrew Murray
2020-01-23 11:58 ` [PATCH v4 1/3] arm64: cpufeature: Extract capped fields Andrew Murray
2020-01-23 11:58 ` Andrew Murray [this message]
2020-01-23 17:04 ` [PATCH v4 2/3] KVM: arm64: limit PMU version to ARMv8.4 Marc Zyngier
2020-01-23 11:58 ` [PATCH v4 3/3] arm64: perf: Add support for ARMv8.5-PMU 64-bit counters Andrew Murray
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