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[72.189.64.225]) by smtp.gmail.com with ESMTPSA id h203sm216399ywb.98.2020.02.05.09.59.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Feb 2020 09:59:59 -0800 (PST) Date: Wed, 5 Feb 2020 12:59:45 -0500 From: William Breathitt Gray To: Fabrice Gasnier , jic23@kernel.org Subject: Re: [PATCH] counter: stm32-timer-cnt: add power management support Message-ID: <20200205175945.GA57132@icarus> References: <1580899678-26393-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1580899678-26393-1-git-send-email-fabrice.gasnier@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200205_100002_126617_46DBD48D X-CRM114-Status: GOOD ( 18.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.torgue@st.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, benjamin.gaignard@st.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Feb 05, 2020 at 11:47:58AM +0100, Fabrice Gasnier wrote: > Add suspend/resume PM sleep ops. When going to low power, enforce the > counter isn't active. > > Signed-off-by: Fabrice Gasnier These changes are purely for the PM ops and don't involve the Counter API, so I don't see any see any issues with this patch from my end. Acked-by: William Breathitt Gray > --- > drivers/counter/stm32-timer-cnt.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c > index 3eafcce..3b84503 100644 > --- a/drivers/counter/stm32-timer-cnt.c > +++ b/drivers/counter/stm32-timer-cnt.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > > #define TIM_CCMR_CCXS (BIT(8) | BIT(0)) > @@ -358,10 +359,33 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev) > priv->counter.num_signals = ARRAY_SIZE(stm32_signals); > priv->counter.priv = priv; > > + platform_set_drvdata(pdev, priv); > + > /* Register Counter device */ > return devm_counter_register(dev, &priv->counter); > } > > +static int __maybe_unused stm32_timer_cnt_suspend(struct device *dev) > +{ > + struct stm32_timer_cnt *priv = dev_get_drvdata(dev); > + u32 cr1; > + > + /* Check for active counter */ > + regmap_read(priv->regmap, TIM_CR1, &cr1); > + if (cr1 & TIM_CR1_CEN) > + return -EBUSY; > + > + return pinctrl_pm_select_sleep_state(dev); > +} > + > +static int __maybe_unused stm32_timer_cnt_resume(struct device *dev) > +{ > + return pinctrl_pm_select_default_state(dev); > +} > + > +static SIMPLE_DEV_PM_OPS(stm32_timer_cnt_pm_ops, stm32_timer_cnt_suspend, > + stm32_timer_cnt_resume); > + > static const struct of_device_id stm32_timer_cnt_of_match[] = { > { .compatible = "st,stm32-timer-counter", }, > {}, > @@ -373,6 +397,7 @@ static struct platform_driver stm32_timer_cnt_driver = { > .driver = { > .name = "stm32-timer-counter", > .of_match_table = stm32_timer_cnt_of_match, > + .pm = &stm32_timer_cnt_pm_ops, > }, > }; > module_platform_driver(stm32_timer_cnt_driver); > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel