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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id n2sm1301901pfq.50.2020.02.10.12.05.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2020 12:05:47 -0800 (PST) Date: Mon, 10 Feb 2020 12:05:44 -0800 From: Bjorn Andersson To: Nikolay Borisov Subject: Re: [PATCH 1/3] hwspinlock: sunxi: Implement support for Allwinner's A64 SoC Message-ID: <20200210200544.GA1443@yoga> References: <20200210170143.20007-1-nborisov@suse.com> <20200210170143.20007-2-nborisov@suse.com> <20200210185730.GL955802@ripper> <45d491fa-716a-eb6a-f1a3-621363675a17@suse.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <45d491fa-716a-eb6a-f1a3-621363675a17@suse.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200210_120549_693533_6E667374 X-CRM114-Status: GOOD ( 19.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, mripard@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon 10 Feb 11:06 PST 2020, Nikolay Borisov wrote: > > > On 10.02.20 ??. 20:57 ??., Bjorn Andersson wrote: > > On Mon 10 Feb 09:01 PST 2020, Nikolay Borisov wrote: > > [..] > >> diff --git a/drivers/hwspinlock/sunxi_hwspinlock.c b/drivers/hwspinlock/sunxi_hwspinlock.c > >> new file mode 100644 > >> index 000000000000..8e5685357fbf > >> --- /dev/null > >> +++ b/drivers/hwspinlock/sunxi_hwspinlock.c > >> @@ -0,0 +1,181 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* Author: Nikolay Borisov */ > >> + > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > > > > Please sort these. > > alphabetically or reverse christmas tree? > Alphabetically please. > > > >> + > > > >> + hw->clk = clk; > >> + hw->reset = reset; > >> + > >> + io_base += LOCK_BASE_OFFSET; > >> + for (i = 0; i < num_locks; i++) > >> + hw->bank.lock[i].priv = io_base + i * sizeof(u32); > >> + > >> + platform_set_drvdata(pdev, hw); > >> + > >> + ret = hwspin_lock_register(&hw->bank, &pdev->dev, &sunxi_hwspinlock_ops, > >> + 0, num_locks); > > > > People will likely send patches to replace this with > > devm_hwspin_lock_register(), but that will create an invalid ordering > > between the clock disable, reset assert and the hwspinlock > > unregistration. > > > > You could deal with this using devm_add_action() and > > devm_add_action_or_reset() for the clock and reset above. That will save > > us future churn, would clean up your error handling and you could drop > > the remove function completely. > > This is my first rodeo in device driver land so I'm learning. It looks > like what you want here is similar to what there is in > sprd_hwspinlock.c. Will rework it. > Exactly like that, forgot that we had an example of this in the sprd driver. That will ensure that we rely solely on devres to unroll the resources in a suitable order. Regards, Bjorn > > > >> + > >> + if (!ret) > >> + return ret; > >> +out_reset: > >> + reset_control_assert(reset); > >> +out_declock: > >> + clk_disable_unprepare(clk); > >> + return ret; > >> +} > >> + > >> +static int sunxi_hwspinlock_remove(struct platform_device *pdev) > >> +{ > >> + struct sunxi_hwspinlock *hw = platform_get_drvdata(pdev); > >> + int ret; > >> + > >> + ret = hwspin_lock_unregister(&hw->bank); > >> + if (ret) > >> + dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret); > >> + > >> + reset_control_assert(hw->reset); > >> + clk_disable_unprepare(hw->clk); > >> + > >> + return 0; > >> +} > >> + > > > > Regards, > > Bjorn > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel