* [PATCH v2] ARM: imx: limit errata selection to Cortex-A9 based designs
@ 2020-02-05 22:42 Stefan Agner
2020-02-14 3:38 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Stefan Agner @ 2020-02-05 22:42 UTC (permalink / raw)
To: shawnguo, s.hauer
Cc: Anson.Huang, arnd, Stefan Agner, linux, stefan, linux-kernel,
Oleksandr Suvorov, linux-imx, kernel, festevam, linux-arm-kernel
From: Stefan Agner <stefan.agner@toradex.com>
The two erratas 754322 and 775420 are Cortex-A9 specific. The i.MX 6UL
SoCs include a Cortex-A7 CPU and hence do not need this erratas enabeld.
This patch moves the errata selection from the family Kconfig symbol to
the SoC specifc Kconfig symbols where a Cortex-A9 is used.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
arch/arm/mach-imx/Kconfig | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 95584ee02b55..e7d7b90e2cf8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -471,8 +471,6 @@ config SOC_IMX53
config SOC_IMX6
bool
select ARM_CPU_SUSPEND if (PM || CPU_IDLE)
- select ARM_ERRATA_754322
- select ARM_ERRATA_775420
select ARM_GIC
select HAVE_IMX_ANATOP
select HAVE_IMX_GPC
@@ -484,6 +482,8 @@ config SOC_IMX6
config SOC_IMX6Q
bool "i.MX6 Quad/DualLite support"
select ARM_ERRATA_764369 if SMP
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_775420
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD
select PINCTRL_IMX6Q
@@ -494,6 +494,8 @@ config SOC_IMX6Q
config SOC_IMX6SL
bool "i.MX6 SoloLite support"
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_775420
select PINCTRL_IMX6SL
select SOC_IMX6
@@ -502,6 +504,8 @@ config SOC_IMX6SL
config SOC_IMX6SLL
bool "i.MX6 SoloLiteLite support"
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_775420
select PINCTRL_IMX6SLL
select SOC_IMX6
@@ -510,6 +514,8 @@ config SOC_IMX6SLL
config SOC_IMX6SX
bool "i.MX6 SoloX support"
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_775420
select PINCTRL_IMX6SX
select SOC_IMX6
--
2.25.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] ARM: imx: limit errata selection to Cortex-A9 based designs
2020-02-05 22:42 [PATCH v2] ARM: imx: limit errata selection to Cortex-A9 based designs Stefan Agner
@ 2020-02-14 3:38 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2020-02-14 3:38 UTC (permalink / raw)
To: Stefan Agner
Cc: Anson.Huang, arnd, Stefan Agner, s.hauer, linux, linux-kernel,
Oleksandr Suvorov, linux-imx, kernel, festevam, linux-arm-kernel
On Wed, Feb 05, 2020 at 11:42:14PM +0100, Stefan Agner wrote:
> From: Stefan Agner <stefan.agner@toradex.com>
>
> The two erratas 754322 and 775420 are Cortex-A9 specific. The i.MX 6UL
> SoCs include a Cortex-A7 CPU and hence do not need this erratas enabeld.
> This patch moves the errata selection from the family Kconfig symbol to
> the SoC specifc Kconfig symbols where a Cortex-A9 is used.
>
> Signed-off-by: Stefan Agner <stefan@agner.ch>
> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Applied, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2020-02-14 3:38 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-02-05 22:42 [PATCH v2] ARM: imx: limit errata selection to Cortex-A9 based designs Stefan Agner
2020-02-14 3:38 ` Shawn Guo
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).