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[2001:470:b8f6:1b::1]) by smtp.gmail.com with ESMTPSA id m2sm1171204oim.13.2020.02.20.06.50.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2020 06:50:49 -0800 (PST) Received: from minyard.net (unknown [IPv6:2001:470:b8f6:1b:9129:b2b8:445c:a4ff]) by serve.minyard.net (Postfix) with ESMTPSA id 3AEFA18000D; Thu, 20 Feb 2020 14:50:49 +0000 (UTC) Date: Thu, 20 Feb 2020 08:50:48 -0600 From: Corey Minyard To: Marc Zyngier Subject: Re: [PATCH v2] arm64:kgdb: Fix kernel single-stepping Message-ID: <20200220145048.GH3704@minyard.net> References: <20200219152403.3495-1-minyard@acm.org> <1416dca51b52dff349923184f41d48e8@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1416dca51b52dff349923184f41d48e8@kernel.org> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200220_065051_692149_A3B274A2 X-CRM114-Status: GOOD ( 14.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: minyard@acm.org Cc: Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Corey Minyard Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 20, 2020 at 02:21:36PM +0000, Marc Zyngier wrote: > On 2020-02-19 15:24, minyard@acm.org wrote: > > From: Corey Minyard > > [...] > > > After studying the EL0 handling for this, I realized an issue with using > > MDSCR to check if single step is enabled: it can be expensive on a VM. > > So check the task flag first to see if single step is enabled. Then > > check MDSCR if the task flag is set. > > Very tangential remark: I'd really like people *not* to try and optimize > Linux based on the behaviour of a hypervisor. In general, reading a > system register is fast, and the fact that it traps on a given hypervisor > at some point may not be true in the future, nor be a valid assumption > across hypervisors. Normally I would agree, but I based this upon git commit https://github.com/torvalds/linux/commit/2a2830703a2371b47f7b50b1d35cb15dc0e2b717 which seemed to say that it was a significant enough factor to do in the EL0 case. -corey > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel