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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id i2sm3730242pjs.21.2020.02.26.13.39.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2020 13:39:50 -0800 (PST) Date: Wed, 26 Feb 2020 13:39:49 -0800 From: Kees Cook To: Mark Brown Subject: Re: [PATCH v7 08/11] arm64: traps: Shuffle code to eliminate forward declarations Message-ID: <202002261339.53539BA19@keescook> References: <20200226155714.43937-1-broonie@kernel.org> <20200226155714.43937-9-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200226155714.43937-9-broonie@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200226_133952_127063_6C8A688D X-CRM114-Status: GOOD ( 20.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Elliott , Peter Zijlstra , Catalin Marinas , Andrew Jones , Amit Kachhap , Vincenzo Frascino , Will Deacon , linux-arch@vger.kernel.org, Marc Zyngier , Eugene Syromiatnikov , Szabolcs Nagy , Dave Martin , "H . J . Lu " , Yu-cheng Yu , Arnd Bergmann , Jann Horn , Richard Henderson , Kristina =?utf-8?Q?Mart=C5=A1enko?= , Alexander Viro , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Florian Weimer , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, Sudakshina Das Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Feb 26, 2020 at 03:57:11PM +0000, Mark Brown wrote: > From: Dave Martin > > Hoist the IT state handling code earlier in traps.c, to avoid > accumulating forward declarations. > > No functional change. > > Signed-off-by: Dave Martin Reviewed-by: Kees Cook -Kees > Signed-off-by: Mark Brown > --- > arch/arm64/kernel/traps.c | 103 ++++++++++++++++++-------------------- > 1 file changed, 50 insertions(+), 53 deletions(-) > > diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c > index bc9f4292bfc3..3c07a7074145 100644 > --- a/arch/arm64/kernel/traps.c > +++ b/arch/arm64/kernel/traps.c > @@ -272,7 +272,55 @@ void arm64_notify_die(const char *str, struct pt_regs *regs, > } > } > > -static void advance_itstate(struct pt_regs *regs); > +#ifdef CONFIG_COMPAT > +#define PSTATE_IT_1_0_SHIFT 25 > +#define PSTATE_IT_1_0_MASK (0x3 << PSTATE_IT_1_0_SHIFT) > +#define PSTATE_IT_7_2_SHIFT 10 > +#define PSTATE_IT_7_2_MASK (0x3f << PSTATE_IT_7_2_SHIFT) > + > +static u32 compat_get_it_state(struct pt_regs *regs) > +{ > + u32 it, pstate = regs->pstate; > + > + it = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT; > + it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2; > + > + return it; > +} > + > +static void compat_set_it_state(struct pt_regs *regs, u32 it) > +{ > + u32 pstate_it; > + > + pstate_it = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK; > + pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK; > + > + regs->pstate &= ~PSR_AA32_IT_MASK; > + regs->pstate |= pstate_it; > +} > + > +static void advance_itstate(struct pt_regs *regs) > +{ > + u32 it; > + > + /* ARM mode */ > + if (!(regs->pstate & PSR_AA32_T_BIT) || > + !(regs->pstate & PSR_AA32_IT_MASK)) > + return; > + > + it = compat_get_it_state(regs); > + > + /* > + * If this is the last instruction of the block, wipe the IT > + * state. Otherwise advance it. > + */ > + if (!(it & 7)) > + it = 0; > + else > + it = (it & 0xe0) | ((it << 1) & 0x1f); > + > + compat_set_it_state(regs, it); > +} > > void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size) > { > @@ -285,7 +333,7 @@ void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size) > if (user_mode(regs)) > user_fastforward_single_step(current); > > - if (regs->pstate & PSR_MODE32_BIT) > + if (compat_user_mode(regs)) > advance_itstate(regs); > } > > @@ -578,34 +626,6 @@ static const struct sys64_hook sys64_hooks[] = { > {}, > }; > > - > -#ifdef CONFIG_COMPAT > -#define PSTATE_IT_1_0_SHIFT 25 > -#define PSTATE_IT_1_0_MASK (0x3 << PSTATE_IT_1_0_SHIFT) > -#define PSTATE_IT_7_2_SHIFT 10 > -#define PSTATE_IT_7_2_MASK (0x3f << PSTATE_IT_7_2_SHIFT) > - > -static u32 compat_get_it_state(struct pt_regs *regs) > -{ > - u32 it, pstate = regs->pstate; > - > - it = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT; > - it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2; > - > - return it; > -} > - > -static void compat_set_it_state(struct pt_regs *regs, u32 it) > -{ > - u32 pstate_it; > - > - pstate_it = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK; > - pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK; > - > - regs->pstate &= ~PSR_AA32_IT_MASK; > - regs->pstate |= pstate_it; > -} > - > static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs) > { > int cond; > @@ -626,29 +646,6 @@ static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs) > return aarch32_opcode_cond_checks[cond](regs->pstate); > } > > -static void advance_itstate(struct pt_regs *regs) > -{ > - u32 it; > - > - /* ARM mode */ > - if (!(regs->pstate & PSR_AA32_T_BIT) || > - !(regs->pstate & PSR_AA32_IT_MASK)) > - return; > - > - it = compat_get_it_state(regs); > - > - /* > - * If this is the last instruction of the block, wipe the IT > - * state. Otherwise advance it. > - */ > - if (!(it & 7)) > - it = 0; > - else > - it = (it & 0xe0) | ((it << 1) & 0x1f); > - > - compat_set_it_state(regs, it); > -} > - > static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs) > { > int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT; > -- > 2.20.1 > -- Kees Cook _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel