From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83349C4BA24 for ; Wed, 26 Feb 2020 19:15:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54BDD20656 for ; Wed, 26 Feb 2020 19:15:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qqkcNCxi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 54BDD20656 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xD7uqJHFBvAWAT0Yp6ok9I/ElBNteDxEveTLHINenYs=; b=qqkcNCxix294v7 9vMpTq9WlqkRJnqDi2NzS+D2zQbwCwSXXSHtAWncVZCGxoCACUka8x6qfHdoMIqIdymXQcoPQj2AL d0WE8+8aOhZBDvVLefWBlsfm6IUWVr2fxy7sAcqUYv6sLvPVJl9HRhyoxtUFykZ01xxHZwamBonXE PsyHNlZLYWS3moeDAFMmeDfsPCi1FUOxd8RUROs4/mGwQHstltHLmUj0p9Gj/TqsGpMlnnUfTB+TI weMIWg/gU2pI5MAY2IKYHxL4+OIvLI32dL63fClDjG6aGweoACCOiHXDmRmA/y97uuZK5uhczN8dm UlxbSLg0Cgf0+Zuqjbcg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j7299-0007xx-5V; Wed, 26 Feb 2020 19:15:03 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j7296-0007xB-Cb for linux-arm-kernel@lists.infradead.org; Wed, 26 Feb 2020 19:15:01 +0000 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id C71A88022; Wed, 26 Feb 2020 19:15:44 +0000 (UTC) Date: Wed, 26 Feb 2020 11:14:56 -0800 From: Tony Lindgren To: Ard Biesheuvel Subject: Re: [PATCH v4 0/5] ARM: decompressor: use by-VA cache maintenance for v7 cores Message-ID: <20200226191456.GZ37466@atomide.com> References: <20200226165738.11201-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200226165738.11201-1-ardb@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200226_111500_462117_E728DCA9 X-CRM114-Status: GOOD ( 12.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-efi@vger.kernel.org, Nicolas Pitre , Marc Zyngier , Linus Walleij , Russell King , Catalin Marinas , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org * Ard Biesheuvel [200226 16:58]: > While making changes to the EFI stub startup code, I noticed that we are > still doing set/way maintenance on the caches when booting on v7 cores. > This works today on VMs by virtue of the fact that KVM traps set/way ops > and cleans the whole address space by VA on behalf of the guest, and on > most v7 hardware, the set/way ops are in fact sufficient when only one > core is running, as there usually is no system cache. But on systems > like SynQuacer, for which 32-bit firmware is available, the current cache > maintenance only pushes the data out to the L3 system cache, where it > is not visible to the CPU once it turns the MMU and caches off. > > So instead, switch to the by-VA cache maintenance that the architecture > requires for v7 and later (and ARM1176, as a side effect). > > Changes since v3: > - ensure that the region that is cleaned after self-relocation of the zImage > covers the appended DTB, if present I gave these a try on top of the earlier "arm: fix Kbuild issue caused by per-task stack protector GCC plugin" and booting still works for me on armv7 including appended dtb: Tested-by: Tony Lindgren _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel