From: Catalin Marinas <catalin.marinas@arm.com>
To: "Rémi Denis-Courmont" <remi@remlab.net>
Cc: mark.rutland@arm.com, will@kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] arm64: clean up trampoline vector loads
Date: Wed, 18 Mar 2020 17:57:09 +0000 [thread overview]
Message-ID: <20200318175709.GD94111@arrakis.emea.arm.com> (raw)
In-Reply-To: <20200316124046.103844-1-remi@remlab.net>
On Mon, Mar 16, 2020 at 02:40:44PM +0200, Rémi Denis-Courmont wrote:
> From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
>
> This switches from custom instruction patterns to the regular large
> memory model sequence with ADRP and LDR. In doing so, the ADD
> instruction can be eliminated in the SDEI handler, and the code no
> longer assumes that the trampoline vectors and the vectors address both
> start on a page boundary.
>
> Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
I queued the 3 trampoline patches for 5.7. Thanks.
--
Catalin
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next prev parent reply other threads:[~2020-03-18 17:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 12:40 [PATCH 1/3] arm64: clean up trampoline vector loads Rémi Denis-Courmont
2020-03-17 22:30 ` Will Deacon
2020-03-18 17:57 ` Catalin Marinas [this message]
2020-03-18 18:06 ` Catalin Marinas
2020-03-18 18:29 ` Rémi Denis-Courmont
2020-03-18 19:48 ` Remi Denis-Courmont
-- strict thread matches above, loose matches on Subject: below --
2020-03-19 9:12 [PATCHv3 0/3] clean up KPTI / SDEI trampoline data alignment Rémi Denis-Courmont
2020-03-19 9:14 ` [PATCH 1/3] arm64: clean up trampoline vector loads Rémi Denis-Courmont
2020-03-23 12:07 ` Mark Rutland
2020-03-23 12:08 ` Rémi Denis-Courmont
2020-03-23 12:14 ` Mark Rutland
2020-03-23 19:04 ` Catalin Marinas
2020-03-23 20:42 ` Rémi Denis-Courmont
2020-03-24 10:37 ` Catalin Marinas
2020-03-24 10:52 ` Mark Rutland
2020-03-24 11:23 ` Catalin Marinas
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