* [PATCH AUTOSEL 5.5 04/84] clk: imx8mn: Fix incorrect clock defines
[not found] <20200318205321.16066-1-sashal@kernel.org>
@ 2020-03-18 20:52 ` Sasha Levin
2020-03-18 20:52 ` [PATCH AUTOSEL 5.5 06/84] pinctrl: meson-gxl: fix GPIOX sdio pins Sasha Levin
1 sibling, 0 replies; 2+ messages in thread
From: Sasha Levin @ 2020-03-18 20:52 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, devicetree, Shawn Guo, linux-arm-kernel, Anson Huang
From: Anson Huang <Anson.Huang@nxp.com>
[ Upstream commit 5eb40257047fb11085d582b7b9ccd0bffe900726 ]
IMX8MN_CLK_I2C4 and IMX8MN_CLK_UART1's index definitions are incorrect,
fix them.
Fixes: 1e80936a42e1 ("dt-bindings: imx: Add clock binding doc for i.MX8MN")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
include/dt-bindings/clock/imx8mn-clock.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h
index 0f2b8423ce1d1..65ac6eb6c7330 100644
--- a/include/dt-bindings/clock/imx8mn-clock.h
+++ b/include/dt-bindings/clock/imx8mn-clock.h
@@ -122,8 +122,8 @@
#define IMX8MN_CLK_I2C1 105
#define IMX8MN_CLK_I2C2 106
#define IMX8MN_CLK_I2C3 107
-#define IMX8MN_CLK_I2C4 118
-#define IMX8MN_CLK_UART1 119
+#define IMX8MN_CLK_I2C4 108
+#define IMX8MN_CLK_UART1 109
#define IMX8MN_CLK_UART2 110
#define IMX8MN_CLK_UART3 111
#define IMX8MN_CLK_UART4 112
--
2.20.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH AUTOSEL 5.5 06/84] pinctrl: meson-gxl: fix GPIOX sdio pins
[not found] <20200318205321.16066-1-sashal@kernel.org>
2020-03-18 20:52 ` [PATCH AUTOSEL 5.5 04/84] clk: imx8mn: Fix incorrect clock defines Sasha Levin
@ 2020-03-18 20:52 ` Sasha Levin
1 sibling, 0 replies; 2+ messages in thread
From: Sasha Levin @ 2020-03-18 20:52 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, Linus Walleij, linux-gpio, Nicolas Belin,
linux-amlogic, linux-arm-kernel, Jerome Brunet
From: Nicolas Belin <nbelin@baylibre.com>
[ Upstream commit dc7a06b0dbbafac8623c2b7657e61362f2f479a7 ]
In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused
any issue so far because devices using these pins always take both pins
so the resulting configuration is OK.
Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions")
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Nicolas Belin <nbelin@baylibre.com>
Link: https://lore.kernel.org/r/1582204512-7582-1-git-send-email-nbelin@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 1b6e8646700f9..2ac921c83da91 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -147,8 +147,8 @@ static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
-static const unsigned int sdio_cmd_pins[] = { GPIOX_4 };
-static const unsigned int sdio_clk_pins[] = { GPIOX_5 };
+static const unsigned int sdio_clk_pins[] = { GPIOX_4 };
+static const unsigned int sdio_cmd_pins[] = { GPIOX_5 };
static const unsigned int sdio_irq_pins[] = { GPIOX_7 };
static const unsigned int nand_ce0_pins[] = { BOOT_8 };
--
2.20.1
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