Re: [PATCH v2 10/17] ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

Re: [PATCH v2 10/17] ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:47)
> Clocks are in fact slightly different on MMP3. In particular, PLL2 is
> fixed to a different frequency, there's an extra PLL3, and the GPU
> clocks are configured differently.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

This should go through arm-soc.

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Re: [PATCH v2 01/17] clk: mmp2: Remove a unused prototype

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:38)
> There is no mmp_clk_register_pll2() routine.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 02/17] clk: mmp2: Constify some strings

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:39)
> All the parent clock names for the muxes are constant. Add const.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 03/17] dt-bindings: clock: Convert marvell, mmp2-clock to json-schema

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:40)
> Convert the fixed-factor-clock binding to DT schema format using
> json-schema.
> 
> While at that, fix a couple of small errors: make the file base name
> match the compatible string, add an example and document the reg-names
> property.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> Reviewed-by: Rob Herring <robh@kernel.org>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:41)
> The clk-of-mmp2 driver pretends that the clock outputs from the PLLs are
> constant, but in fact they are configurable.
> 
> Add logic for obtaining the actual clock rates on MMP2 as well as MMP3.
> There is no documentation for either SoC, but the "systemsetting" drivers
> from Marvell GPL code dump provide some clue as far as MPMU registers on
> MMP2 [1] and MMP3 [2] go.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp2_systemsetting.c
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp3_systemsetting.c
> 
> A separate commit will adjust the clk-of-mmp2 driver.
> 
> Tested on a MMP3-based Dell Wyse 3020 as well as MMP2-based OLPC
> XO-1.75 laptop.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 05/17] clk: mmp2: Stop pretending PLL outputs are constant

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:42)
> The hardcoded values for PLL1 and PLL2 are wrong. PLL1 is slightly
> off -- it defaults to 797.33 MHz, not 800 MHz. PLL2 is disabled by default,
> but also configurable.
> 
> Tested on a MMP2-based OLPC XO-1.75 laptop, with PLL1=797.33 and various
> values of PLL2 set via set-pll2-520mhz, set-pll2-910mhz and
> set-pll2-988mhz Open Firmware words.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 06/17] dt-bindings: clock: Add MMP3 compatible string

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:43)
> This binding describes the PMUs that are found on MMP3 as well. Add the
> compatible strings and adjust the description.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> Reviewed-by: Rob Herring <robh@kernel.org>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 07/17] clk: mmp2: Check for MMP3

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:44)
> The MMP3's are similar enough to MMP2, but there are differencies, such
> are more clocks available on the newer model. We want to tell which
> platform are we on.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 08/17] dt-bindings: marvell, mmp2: Add clock ids for MMP3 PLLs

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:45)
> MMP3 variant provides some more clocks. Add respective IDs.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> Acked-by: Rob Herring <robh@kernel.org>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 09/17] clk: mmp2: Add PLLs that are available on MMP3

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:46)
> There are more PLLs on MMP3 and are configured slightly differently.
> Tested on a MMP3-based Dell Wyse 3020 machine.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---

Applied to clk-next

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Re: [PATCH v2 11/17] dt-bindings: marvell, mmp2: Add clock ids for the GPU clocks

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:48)
> MMP2 has a single GC860 core while MMP3 has a GC2000 and a GC300.
> On both platforms there's an AXI bus interface clock that's common for
> all GPUs and each GPU core has a separate clock.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 12/17] clk: mmp2: add the GPU clocks

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:49)
> MMP2 has a single GC860 core while MMP3 has a GC2000 and a GC300.
> On both platforms there's an AXI bus interface clock that's common for
> all GPUs and each GPU core has a separate clock.
> 
> Meaning of the relevant APMU_GPU bits were gotten from James Cameron's
> message and [1], the OLPC OS kernel source [2] and Marvell's MMP3 tree.
> 
> [1] http://lists.laptop.org/pipermail/devel/2019-April/039053.html
> [2] http://dev.laptop.org/git/olpc-kernel/commit/arch/arm/mach-mmp/mmp2.c?h=arm-3.0-wip&id=8ce9f6122
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 13/17] dt-bindings: marvell, mmp2: Add clock ids for the thermal sensors

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:50)
> There seems to be a single thermal sensor block on MMP2 and a couple
> more on MMP3. Add definitions for their respective clocks.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 14/17] clk: mmp2: Add clocks for the thermal sensors

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:51)
> The register definitions gotten from OLPC Open Firmware.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 15/17] dt-bindings: marvell, mmp2: Add clock id for the fifth SD HCI on MMP3

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:52)
> There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
> XO-4. Add a clock for it.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 16/17] clk: mmp2: Add clock for fifth SD HCI on MMP3

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:53)
> There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
> XO-4. Add a clock for it.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 17/17] clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks

[Stephen Boyd]

Quoting Lubomir Rintel (2020-03-09 12:42:54)
> They were reversed because I read the datasheet upside down.
> Actually there is no datasheet, but I ended up understanding the
> comments in Open Firmware driver wrong.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> ---

Applied to clk-next

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Re: [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

[Guenter Roeck]

On Mon, Mar 09, 2020 at 08:42:41PM +0100, Lubomir Rintel wrote:
> The clk-of-mmp2 driver pretends that the clock outputs from the PLLs are
> constant, but in fact they are configurable.
> 
> Add logic for obtaining the actual clock rates on MMP2 as well as MMP3.
> There is no documentation for either SoC, but the "systemsetting" drivers
> from Marvell GPL code dump provide some clue as far as MPMU registers on
> MMP2 [1] and MMP3 [2] go.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp2_systemsetting.c
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp3_systemsetting.c
> 
> A separate commit will adjust the clk-of-mmp2 driver.
> 
> Tested on a MMP3-based Dell Wyse 3020 as well as MMP2-based OLPC
> XO-1.75 laptop.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>

This patch results in:

arm-linux-gnueabi-ld: drivers/clk/mmp/clk.o: in function `mmp_register_pll_clks':
drivers/clk/mmp/clk.c:192: undefined reference to `mmp_clk_register_pll'

when building arm:pxa910_defconfig.

Bisect log is attached.

Guenter

---
# bad: [a10c9c710f9ecea87b9f4bbb837467893b4bef01] Merge tag 'for-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
# good: [4c205c84e249e0a91dcfabe461d77667ec9b2d05] Merge tag 'keys-fixes-20200329' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs
git bisect start 'a10c9c710f9e' '4c205c84e249'
# bad: [31c0aa87ec8a30b1e9e4cf862905a369560f7705] Merge tag 'random_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/random
git bisect bad 31c0aa87ec8a30b1e9e4cf862905a369560f7705
# bad: [53a2cc5cc36fd97728e1b418dbfa8f70bf23391a] Merge branches 'clk-ti', 'clk-ingenic', 'clk-typo', 'clk-at91', 'clk-mmp2' and 'clk-arm-icst' into clk-next
git bisect bad 53a2cc5cc36fd97728e1b418dbfa8f70bf23391a
# good: [2d11e9a1fd2abe784b334442b36f7d83ff914287] Merge branches 'clk-phase-errors', 'clk-amlogic', 'clk-renesas' and 'clk-allwinner' into clk-next
git bisect good 2d11e9a1fd2abe784b334442b36f7d83ff914287
# bad: [de17be999cb07effacf6a1129602f63396f5af27] clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
git bisect bad de17be999cb07effacf6a1129602f63396f5af27
# bad: [4d6da655d1871fadcb2b5de086e5a35883e22c95] dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs
git bisect bad 4d6da655d1871fadcb2b5de086e5a35883e22c95
# bad: [5d34d0b32d6c13947b0aa890fc4c68f203491169] clk: mmp2: Add support for PLL clock sources
git bisect bad 5d34d0b32d6c13947b0aa890fc4c68f203491169
# good: [cb8dbfe831758fb2ba52d8c30db5249e48f57b8b] clk: mmp2: Constify some strings
git bisect good cb8dbfe831758fb2ba52d8c30db5249e48f57b8b
# good: [7de0b8b8b0508af5fed2f2a07e3abb6acac0c466] dt-bindings: clock: Convert marvell,mmp2-clock to json-schema
git bisect good 7de0b8b8b0508af5fed2f2a07e3abb6acac0c466
# first bad commit: [5d34d0b32d6c13947b0aa890fc4c68f203491169] clk: mmp2: Add support for PLL clock sources

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Re: [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

[Stephen Boyd]

Quoting Guenter Roeck (2020-04-06 12:30:50)
> On Mon, Mar 09, 2020 at 08:42:41PM +0100, Lubomir Rintel wrote:
> > The clk-of-mmp2 driver pretends that the clock outputs from the PLLs are
> > constant, but in fact they are configurable.
> > 
> > Add logic for obtaining the actual clock rates on MMP2 as well as MMP3.
> > There is no documentation for either SoC, but the "systemsetting" drivers
> > from Marvell GPL code dump provide some clue as far as MPMU registers on
> > MMP2 [1] and MMP3 [2] go.
> > 
> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp2_systemsetting.c
> > [2] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp3_systemsetting.c
> > 
> > A separate commit will adjust the clk-of-mmp2 driver.
> > 
> > Tested on a MMP3-based Dell Wyse 3020 as well as MMP2-based OLPC
> > XO-1.75 laptop.
> > 
> > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> 
> This patch results in:
> 
> arm-linux-gnueabi-ld: drivers/clk/mmp/clk.o: in function `mmp_register_pll_clks':
> drivers/clk/mmp/clk.c:192: undefined reference to `mmp_clk_register_pll'
> 
> when building arm:pxa910_defconfig.
> 

Thanks. I see that Arnd has sent a fix for this.

https://lore.kernel.org/r/20200408160518.2798571-1-arnd@arndb.de

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