Re: [RFC PATCH v2] arm64: cpufeatures: add support for tlbi range instructions

From: Will Deacon <will@kernel.org>
To: Hanjun Guo <guohanjun@huawei.com>
Cc: mark.rutland@arm.com, Rob Herring <robh@kernel.org>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	Anna.Chen@arm.com, Zhenyu Ye <yezhenyu2@huawei.com>,
	catalin.marinas@arm.com, suzuki.poulose@arm.com,
	'Matteo Carlini' <Matteo.Carlini@arm.com>,
	xiexiangyou@huawei.com, Linuxarm <linuxarm@huawei.com>,
	Shaokun Zhang <zhangshaokun@hisilicon.com>,
	tangnianyao@huawei.com, Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org, qiuzhenfa@hisilicon.com
Subject: Re: [RFC PATCH v2] arm64: cpufeatures: add support for tlbi range instructions
Date: Tue, 14 Apr 2020 08:08:10 +0100	[thread overview]
Message-ID: <20200414070809.GA24197@willie-the-truck> (raw)
In-Reply-To: <5af3a54c-c058-78a8-eba2-9e2ef666beee@huawei.com>

On Sat, Apr 11, 2020 at 02:39:13PM +0800, Hanjun Guo wrote:
> On 2020/4/10 20:02, Will Deacon wrote:
> > On Fri, Apr 10, 2020 at 12:54:46PM +0100, Will Deacon wrote:
> > > On Fri, Apr 10, 2020 at 09:43:49AM +0800, Hanjun Guo wrote:
> > > > On 2019/11/20 9:29, Hanjun Guo wrote:
> > > > > > 
> > > > > > I also wonder if the ARMv8.4-TTL extension (which I have patches for in
> > > > > > the nested virt series) requires the same kind of treatment (after all,
> > > > > > it has an implicit range based on the base granule size and level).
> > > > > > 
> > > > > > In any way, this requires careful specification, and I don't think
> > > > > > we can improvise this on the ML... ;-)
> > > > > 
> > > > > Sure :), the good news is that ARM officially announced will be
> > > > > working with Huawei again.
> > > > > 
> > > > > So if I understand your point correctly, we need steps to take:
> > > > >    - ARM spec needs to make TIBi by range crystal clear and being
> > > > >      written down in the spec;
> > > > >    - Firmware description of supporting TLBi by range in system level
> > > > >      for both FDT and ACPI;
> > > > >    - Then upstream the code.
> > > > 
> > > > Do we have update here? I noticed that the TLBI by rang for SMMU is
> > > > merged for upstream from Rob, any plan or progress for the CPU side?
> > > > 
> > > > Sorry to ping you on the mailling list, our upcoming new chip has
> > > > this feature and it's good to enable it, so it's a bit urgent for us.
> > > 
> > > Have you tried look at the latest version of the patches rather than
> > > "pinging" old history? We're also in the merge window at the moment, so
> > > please cut us some slack.
> > > 
> > > I also fail to see the urgency. This thing is a pure performance play, and a
> > > fairly niche one at that. I'm not especially comfortable ripping up our TLBI
> > > code without being able to test it.
> > 
> > Argh, so while it *is* the middle of the merge window and I do fail to see
> > the urgency of this, I also mixed it up with the TTL series, which is the one
> > I'm really worried about.
> > 
> > Please post a v3 at -rc1.
> 
> A bit lost here, do you mean the TLBi by range patch or the TTL series?

I'm worried about the TTL series without being able to test it.
Please post a v3 of the TLBI by range patch again when you get a chance.

Sorry for the confusion, I got mixed up between the two series.

Will

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