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[217.229.29.98]) by smtp.gmail.com with ESMTPSA id q143sm19971427wme.31.2020.04.14.07.34.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 07:34:25 -0700 (PDT) Date: Tue, 14 Apr 2020 16:34:24 +0200 From: Thierry Reding To: Dmitry Osipenko Subject: Re: [PATCH v6 07/14] clk: tegra: Implement Tegra210 EMC clock Message-ID: <20200414143424.GG3593749@ulmo> References: <20200409175238.3586487-1-thierry.reding@gmail.com> <20200409175238.3586487-8-thierry.reding@gmail.com> <8dc000fb-8867-cf8f-8204-a9e1e79a4811@gmail.com> MIME-Version: 1.0 In-Reply-To: <8dc000fb-8867-cf8f-8204-a9e1e79a4811@gmail.com> User-Agent: Mutt/1.13.1 (2019-12-14) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200414_073429_427278_D27B630C X-CRM114-Status: GOOD ( 17.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , Jon Hunter , Rob Herring , Joseph Lo , linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: multipart/mixed; boundary="===============3928922501043889865==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============3928922501043889865== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="pE2VAHO2njSJCslu" Content-Disposition: inline --pE2VAHO2njSJCslu Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Apr 09, 2020 at 09:24:31PM +0300, Dmitry Osipenko wrote: > 09.04.2020 20:52, Thierry Reding =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > ... > > +static long tegra210_clk_emc_round_rate(struct clk_hw *hw, unsigned lo= ng rate, > > + unsigned long *prate) > > +{ > > + struct tegra210_clk_emc *emc =3D to_tegra210_clk_emc(hw); > > + struct tegra210_clk_emc_provider *provider =3D emc->provider; > > + unsigned int i; > > + > > + if (!provider || !provider->configs || provider->num_configs =3D=3D 0) > > + return clk_hw_get_rate(hw); >=20 > This still looks wrong to me. Nobody should be able to get EMC clock > until provider is registered. The EMC clock is mostly orthogonal to the provider. The provider really only allows you to actually change the frequency. The clock will still remain even if the provider goes away, it just will loose the ability to change rate. > This is troublesome, especially given that you're allowing the EMC > driver to be compiled as a loadable module. For example, this won't work > with the current ACTMON driver because it builds OPP table based on the > clk-rate rounding during the driver's probe, so it won't be able to do > it properly if provider is "temporarily" missing. >=20 > ... I think that in a longer run we should stop manually building the > ACTMON's OPP table and instead define a proper OPP table (per-HW Speedo > ID, with voltages) in a device-tree. But this is just a vague plans for > the future for now. This code only applies to Tegra210 and we don't currently support ACTMON on Tegra210. I'm also not sure we'll ever do because using interconnects to describe paths to system memory and then using ICC requests for each driver to submit memory bandwidth requests seems like a better way of dealing with this problem than using ACTMON to monitor activity because that only allows you to react, whereas we really want to be able to allocate memory bandwidth upfront. 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