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Thu, 23 Apr 2020 16:37:37 -0400 (EDT) Date: Thu, 23 Apr 2020 22:37:35 +0200 From: Maxime Ripard To: Philipp Rossak Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200423203735.imlafyw6oz6dspev@gilmour.lan> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> <5749af21-e707-c998-c83b-50c48867c9e8@gmail.com> MIME-Version: 1.0 In-Reply-To: <5749af21-e707-c998-c83b-50c48867c9e8@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200423_133746_237172_2C79FF99 X-CRM114-Status: GOOD ( 26.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Airlie , "H. Nikolaus Schaller" , "open list:DRM PANEL DRIVERS" , linux-mips@vger.kernel.org, Paul Cercueil , linux-samsung-soc@vger.kernel.org, Discussions about the Letux Kernel , Paul Burton , Krzysztof Kozlowski , Tony Lindgren , Chen-Yu Tsai , Kukjin Kim , James Hogan , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , =?utf-8?Q?Beno=C3=AEt?= Cousson , Rob Herring , linux-omap , arm-soc , Thomas Bogendoerfer , OpenPVRSGX Linux Driver Group , Linux Kernel Mailing List , Ralf Baechle , Daniel Vetter , kernel@pyra-handheld.com Content-Type: multipart/mixed; boundary="===============7776854970486427746==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============7776854970486427746== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="uldmalad7cdsj5zk" Content-Disposition: inline --uldmalad7cdsj5zk Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 21, 2020 at 06:42:17PM +0200, Philipp Rossak wrote: > Hi, >=20 > On 21.04.20 13:21, Maxime Ripard wrote: > > Hi, > >=20 > > On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > > > On 20.04.20 09:38, Maxime Ripard wrote: > > > > Hi, > > > >=20 > > > > On Fri, Apr 17, 2020 at 02:09:06PM +0200, Philipp Rossak wrote: > > > > > > > I'm a bit skeptical on that one since it doesn't even list the > > > > > > > interrupts connected to the GPU that the binding mandates. > > > > > >=20 > > > > > > I think he left it out for a future update. > > > > > > But best he comments himself. > > > > >=20 > > > > > I'm currently working on those bindings. They are now 90% done, b= ut they are > > > > > not finished till now. Currently there is some mainline support m= issing to > > > > > add the full binding. The A83T and also the A31/A31s have a GPU P= ower Off > > > > > Gating Register in the R_PRCM module, that is not supported right= now in > > > > > Mainline. The Register need to be written when the GPU is powered= on and > > > > > off. > > > > >=20 > > > > > @Maxime: I totally agree on your point that a demo needs to be pr= ovided > > > > > before the related DTS patches should be provided. That's the rea= son why I > > > > > added the gpu placeholder patches. > > > > > Do you have an idea how a driver for the R_PRCM stuff can look li= ke? I'm not > > > > > that experienced with the clock driver framework. > > > >=20 > > > > It looks like a power-domain to me, so you'd rather plug that into = the genpd > > > > framework. > > >=20 > > > I had a look on genpd and I'm not really sure if that fits. > > >=20 > > > It is basically some bit that verify that the clocks should be enable= d or > > > disabled. > >=20 > > No, it can do much more than that. It's a framework to control the SoCs= power > > domains, so clocks might be a part of it, but most of the time it's goi= ng to be > > about powering up a particular device. > >=20 > So I think I've found now the right piece of documentation and a driver t= hat > implements something similar [1]. >=20 > So I will write a similar driver like linked above that only sets the rig= ht > bits for A83T and A31/A31s. > Do you think this is the right approach? That sounds about right yes Maxime --uldmalad7cdsj5zk Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXqH8jwAKCRDj7w1vZxhR xa6OAPsG0hWkJM/X3rADW428/4uNb7tDwdYNFydI9sbl6UhzkAEAxIit7pCZ/iLs 0cgwkg9mtFDlpNF5/GCnOiGoztgoNAU= =F7xP -----END PGP SIGNATURE----- --uldmalad7cdsj5zk-- --===============7776854970486427746== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============7776854970486427746==--