From: Catalin Marinas <catalin.marinas@arm.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: vigneshr@ti.com, richard@nod.at, miquel.raynal@bootlin.com,
linux-mtd@lists.infradead.org, sudeep.holla@arm.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] mtd: cfi_cmdset_0001: Support the absence of protection registers
Date: Thu, 30 Apr 2020 17:32:45 +0100 [thread overview]
Message-ID: <20200430163245.GK2717@gaia> (raw)
In-Reply-To: <20200417142325.2931423-1-jean-philippe@linaro.org>
On Fri, Apr 17, 2020 at 04:23:26PM +0200, Jean-Philippe Brucker wrote:
> The flash controller implemented by the Arm Base platform behaves like
> the Intel StrataFlash J3 device, but omits several features. In
> particular it doesn't implement a protection register, so "Number of
> Protection register fields" in the Primary Vendor-Specific Extended
> Query, is 0.
>
> The Intel StrataFlash J3 datasheet only lists 1 as a valid value for
> NumProtectionFields. It describes the field as:
>
> "Number of Protection register fields in JEDEC ID space.
> “00h,” indicates that 256 protection bytes are available"
>
> While a value of 0 may arguably not be architecturally valid, the
> driver's current behavior is certainly wrong: if NumProtectionFields is
> 0, read_pri_intelext() adds a negative value to the unsigned extra_size,
> and ends up in an infinite loop.
>
> Fix it by ignoring a NumProtectionFields of 0.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
If you need another confirmation:
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
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next prev parent reply other threads:[~2020-04-30 16:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 14:23 [PATCH] mtd: cfi_cmdset_0001: Support the absence of protection registers Jean-Philippe Brucker
2020-04-29 14:47 ` Sudeep Holla
2020-04-30 16:32 ` Catalin Marinas [this message]
2020-05-01 6:24 ` Vignesh Raghavendra
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