From: Jim Quinlan <james.quinlan@broadcom.com>
To: james.quinlan@broadcom.com
Cc: "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
Rob Herring <robh@kernel.org>,
Florian Fainelli <f.fainelli@gmail.com>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS"
<linux-pci@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@broadcom.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
Jim Quinlan <james.quinlan@broadcom.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Subject: [PATCH 2/5] PCI: brcmstb: fix window register offset from 4 to 8
Date: Thu, 30 Apr 2020 14:55:19 -0400 [thread overview]
Message-ID: <20200430185522.4116-2-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200430185522.4116-1-james.quinlan@broadcom.com>
From: Jim Quinlan <jquinlan@broadcom.com>
The oubound memory window registers were being referenced
with an incorrect offset. This probably wasn't noticed
previously as there was likely only one such outbound window.
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
---
drivers/pci/controller/pcie-brcmstb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 454917ee9241..5b0dec5971b8 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -54,11 +54,11 @@
#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c
#define PCIE_MEM_WIN0_LO(win) \
- PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 8)
#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010
#define PCIE_MEM_WIN0_HI(win) \
- PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 8)
#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c
#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f
--
2.17.1
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next prev parent reply other threads:[~2020-04-30 18:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 18:55 [PATCH 1/5] PCI: brcmstb: don't clk_put() a managed clock Jim Quinlan
2020-04-30 18:55 ` Jim Quinlan [this message]
2020-04-30 19:07 ` [PATCH 2/5] PCI: brcmstb: fix window register offset from 4 to 8 Florian Fainelli
2020-04-30 20:43 ` Bjorn Helgaas
2020-04-30 18:55 ` [PATCH 3/5] PCI: brcmstb: enable CRS Jim Quinlan
2020-04-30 19:19 ` Florian Fainelli
2020-04-30 20:32 ` Bjorn Helgaas
2020-04-30 21:00 ` Jim Quinlan
2020-04-30 18:55 ` [PATCH 4/5] dt-bindings: PCI: brcmstb: New prop 'brcm,aspm-en-l0s' Jim Quinlan
2020-04-30 19:20 ` Florian Fainelli
2020-04-30 18:55 ` [PATCH 5/5] PCI: brcmstb: disable L0s component of ASPM by default Jim Quinlan
2020-04-30 19:21 ` Florian Fainelli
2020-04-30 20:40 ` Bjorn Helgaas
2020-04-30 21:17 ` Jim Quinlan
2020-04-30 19:05 ` [PATCH 1/5] PCI: brcmstb: don't clk_put() a managed clock Florian Fainelli
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