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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id y3sm2397280pfb.132.2020.05.06.11.02.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2020 11:02:27 -0700 (PDT) Date: Wed, 6 May 2020 12:02:24 -0600 From: Mathieu Poirier To: Mike Leach Subject: Re: [PATCH v2 2/2] coresight: cti: Add CPU idle pm notifer to CTI devices. Message-ID: <20200506180224.GC29826@xps15> References: <20200504161530.9284-1-mike.leach@linaro.org> <20200504161530.9284-3-mike.leach@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200504161530.9284-3-mike.leach@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200506_110229_375477_2E33E01B X-CRM114-Status: GOOD ( 19.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, May 04, 2020 at 05:15:30PM +0100, Mike Leach wrote: > Adds a notify callback for CPU PM events to the CTI driver - for > CPU bound CTI devices. > > Signed-off-by: Mike Leach > --- > drivers/hwtracing/coresight/coresight-cti.c | 82 +++++++++++++++++++++ > 1 file changed, 82 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-cti.c b/drivers/hwtracing/coresight/coresight-cti.c > index 9af66719ae5b..0f0c14528701 100644 > --- a/drivers/hwtracing/coresight/coresight-cti.c > +++ b/drivers/hwtracing/coresight/coresight-cti.c > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -655,6 +656,84 @@ static void cti_remove_conn_xrefs(struct cti_drvdata *drvdata) > } > } > > +/** cti PM callbacks **/ > +static int cti_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, > + void *v) > +{ > + struct cti_drvdata *drvdata; > + unsigned int cpu = smp_processor_id(); > + int notify_res = NOTIFY_OK; > + > + if (!cti_cpu_drvdata[cpu]) > + return NOTIFY_OK; > + > + drvdata = cti_cpu_drvdata[cpu]; > + > + if (WARN_ON_ONCE(drvdata->ctidev.cpu != cpu)) > + return NOTIFY_BAD; > + > + spin_lock(&drvdata->spinlock); > + > + switch (cmd) { > + case CPU_PM_ENTER: > + /* CTI regs all static - we have a copy & nothing to save */ > + drvdata->config.hw_powered = false; > + if (drvdata->config.hw_enabled) > + coresight_disclaim_device(drvdata->base); > + break; > + > + case CPU_PM_ENTER_FAILED: > + drvdata->config.hw_powered = true; > + if (drvdata->config.hw_enabled) { > + if (coresight_claim_device(drvdata->base)) > + drvdata->config.hw_enabled = false; > + } > + break; > + > + case CPU_PM_EXIT: > + /* write hardware registers to re-enable. */ > + drvdata->config.hw_powered = true; > + drvdata->config.hw_enabled = false; > + > + /* check enable reference count to enable HW */ > + if (atomic_read(&drvdata->config.enable_req_count)) { > + /* check we can claim the device as we re-power */ > + if (coresight_claim_device(drvdata->base)) > + goto cti_notify_exit; > + > + drvdata->config.hw_enabled = true; > + cti_write_all_hw_regs(drvdata); > + } > + break; > + > + default: > + notify_res = NOTIFY_DONE; > + break; > + } > + > +cti_notify_exit: > + spin_unlock(&drvdata->spinlock); > + return notify_res; > +} > + > +static struct notifier_block cti_cpu_pm_nb = { > + .notifier_call = cti_cpu_pm_notify, > +}; > + > +static int cti_cpu_pm_register(void) > +{ > + if (IS_ENABLED(CONFIG_CPU_PM)) > + return cpu_pm_register_notifier(&cti_cpu_pm_nb); Looking further into function cpu_pm_register_notifier(), it simply returns '0' if CONFIG_CPU_PM is not defined. As such cpu_pm_register_notifier() can be called directly from cti_probe(). The same applies to cpu_pm_unregister_notifier(). > + > + return 0; > +} > + > +static void cti_cpu_pm_unregister(void) > +{ > + if (IS_ENABLED(CONFIG_CPU_PM)) > + cpu_pm_unregister_notifier(&cti_cpu_pm_nb); > +} > + > /* CPU HP handlers */ > static int cti_starting_cpu(unsigned int cpu) > { > @@ -686,6 +765,8 @@ static void cti_pm_release(struct cti_drvdata *drvdata) > { > if (drvdata->ctidev.cpu >= 0) { > if (--nr_cti_cpu == 0) { > + cti_cpu_pm_unregister(); > + > cpuhp_remove_state_nocalls( > CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); > } > @@ -814,6 +895,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) > "arm/coresight_cti:starting", > cti_starting_cpu, cti_dying_cpu); > > + ret = cti_cpu_pm_register(); This should be one only if cpuhp_remove_state_nocalls() hasn't returned an error. Otherwise this looks good. Thanks, Mathieu > cpus_read_unlock(); > if (ret) > goto err_out; > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel