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Fri, 15 May 2020 11:14:02 +0000 Date: Fri, 15 May 2020 12:14:00 +0100 From: Szabolcs Nagy To: Catalin Marinas Subject: Re: [PATCH v3 23/23] arm64: mte: Add Memory Tagging Extension documentation Message-ID: <20200515111359.GC27289@arm.com> References: <20200421142603.3894-1-catalin.marinas@arm.com> <20200421142603.3894-24-catalin.marinas@arm.com> <20200429164705.GF30377@arm.com> <20200430162316.GJ2717@gaia> <20200504164617.GK30377@arm.com> <20200511164018.GC19176@gaia> <20200513154845.GT21779@arm.com> <20200514113722.GA1907@gaia> <20200515103839.GA22393@gaia> Content-Disposition: inline In-Reply-To: <20200515103839.GA22393@gaia> User-Agent: Mutt/1.9.4 (2018-02-28) X-ClientProxiedBy: LO2P265CA0268.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:a1::16) To AM6PR08MB3047.eurprd08.prod.outlook.com (2603:10a6:209:4c::23) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from arm.com (217.140.106.55) by LO2P265CA0268.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:a1::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.24 via Frontend Transport; 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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB2943 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200515_041415_670713_27832A33 X-CRM114-Status: GOOD ( 23.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Richard Earnshaw , nd@arm.com, Will Deacon , Andrey Konovalov , Kevin Brodsky , linux-mm@kvack.org, Vincenzo Frascino , Peter Collingbourne , Dave Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org The 05/15/2020 11:38, Catalin Marinas wrote: > On Thu, May 14, 2020 at 12:37:22PM +0100, Catalin Marinas wrote: > > On Wed, May 13, 2020 at 04:48:46PM +0100, Dave P Martin wrote: > > > > > > On Wed, Apr 29, 2020 at 05:47:05PM +0100, Dave P Martin wrote: > > > > > > > On Tue, Apr 21, 2020 at 03:26:03PM +0100, Catalin Marinas wrote: > > > > > > > > +excludes all tags other than 0. A user thread can enable specific tags > > > > > > > > +in the randomly generated set using the ``prctl(PR_SET_TAGGED_ADDR_CTRL, > > > > > > > > +flags, 0, 0, 0)`` system call where ``flags`` contains the tags bitmap > > > > > > > > +in the ``PR_MTE_TAG_MASK`` bit-field. > > > > > > > > + > > > > > > > > +**Note**: The hardware uses an exclude mask but the ``prctl()`` > > > > > > > > +interface provides an include mask. An include mask of ``0`` (exclusion > > > > > > > > +mask ``0xffff``) results in the CPU always generating tag ``0``. > > > > > > > > > > > > > > Is there no way to make this default to 1 rather than having a magic > > > > > > > meaning for 0? > > [...] > > > The only configuration that doesn't make sense is "no tags allowed", so > > > I'd argue for explicity blocking that, even if the architeture aliases > > > that encoding to something else. > > > > > > If we prefer 0 as a default value so that init inherits the correct > > > value from the kernel without any special acrobatics, then we make it an > > > exclude mask, with the semantics that the hardware is allowed to > > > generate any of these tags, but does not have to be capable of > > > generating all of them. > > > > That's more of a question to the libc people and their preference. > > We have two options with suboptions: > > > > 1. prctl() gets an exclude mask with 0xffff illegal even though the > > hardware accepts it: > > a) default exclude mask 0, allowing all tags to be generated by IRG > > b) default exclude mask of 0xfffe so that only tag 0 is generated > > > > 2. prctl() gets an include mask with 0 illegal: > > a) default include mask is 0xffff, allowing all tags to be generated > > b) default include mask 0f 0x0001 so that only tag 0 is generated > > > > We currently have (2) with mask 0 but could be changed to (2.b). If we > > are to follow the hardware description (which makes more sense to me but > > I don't write the C library), (1.a) is the most appropriate. > > Thinking some more about this, as we are to expose the GCR_EL1.Excl via > a ptrace interface as a regset, it makes more sense to move back to an > exclude mask here with default 0. That would be option 1.a above. i think the libc has to do a prctl call to set mte up and at that point it will use whatever arguments necessary, so 1.a should work (just like the other options). likely libc will disable 0 for irg and possibly one or two other fixed colors (which will have specific use). the difference i see between 1 vs 2 is forward compatibility if the architecture changes (e.g. adding more tag bits) but then likely new prctl flag will be needed for handling that so it's probably not an issue. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel