From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95B50C433DF for ; Mon, 18 May 2020 15:00:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 647DA2065F for ; Mon, 18 May 2020 15:00:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ZXZ+UDEb"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="uNdmSK6q" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 647DA2065F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=30xuOuhjkue/3TdMdRyNwt5vWAmJSQY8saECw5z3ov8=; b=ZXZ+UDEbdsKW3T 01ezrZmBZhKllgoLHvq8W7lVJwBfH++AbN0cuhM2yk3yzsOkbFydoFswqtfqJi/5BrL/yJNCM6XBZ xNmvu/5ZsAPsiGqkJdxGhzJUgii9bQAzi0ySpPRIF/drp4HwSc6Rm4BeyBOYwUZqzVFFJ0OAZdxP6 EG4ib98tYCpz0pVinsMegTGYQ9dsT3h+NSw4ZCg6Fdo8uTxETHVVh1RWlNFzXE626hvXNZep6EYm1 FGvogZJb2XRqoE+zZnxd4X5Jbc7b/DTr1Y8GLJHjMr542jC9GGA348HY+JP/Qh+auo7rsjGVPrIFp slU9j0PJUNWjdmKziDcA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jahFi-0004Ip-Gp; Mon, 18 May 2020 15:00:26 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jahFN-00028Z-J6 for linux-arm-kernel@lists.infradead.org; Mon, 18 May 2020 15:00:07 +0000 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 118762065F; Mon, 18 May 2020 15:00:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589814004; bh=RNl6fktbFCVNb99FAXoUAHm7HFGk+HnBZtNJ3HcZJYk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=uNdmSK6qwH2wEs1Dmvxn71gST5OtXhoWG1ERuWlW5HjkBatY1wakm3u6qeoCeqxQW UuvTXUIqydZD04oNCS+WbK4w0/gvCkAac2cxw5Mi7eEB0fEgZsx14Ig0Tku6fZMYvL iKvPC/+BLbKoO+lQB9OJpljl83PFqCY4jW7yueIM= Date: Mon, 18 May 2020 15:59:59 +0100 From: Will Deacon To: Jordan Crouse Subject: Re: [PATCH v6 2/5] iommu/arm-smmu: Add support for TTBR1 Message-ID: <20200518145959.GK32394@willie-the-truck> References: <20200409233350.6343-1-jcrouse@codeaurora.org> <20200409233350.6343-3-jcrouse@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200409233350.6343-3-jcrouse@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200518_080005_710259_B75B43A2 X-CRM114-Status: GOOD ( 23.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 09, 2020 at 05:33:47PM -0600, Jordan Crouse wrote: > Add support to enable TTBR1 if the domain requests it via the > DOMAIN_ATTR_SPLIT_TABLES attribute. If enabled by the hardware > and pagetable configuration the driver will configure the TTBR1 region > and program the domain pagetable on TTBR1. TTBR0 will be disabled. > > After attaching the device the value of he domain attribute can > be queried to see if the split pagetables were successfully programmed. > The domain geometry will be updated as well so that the caller can > determine the active region for the pagetable that was programmed. > > Signed-off-by: Jordan Crouse > --- > > drivers/iommu/arm-smmu.c | 48 ++++++++++++++++++++++++++++++++++------ > drivers/iommu/arm-smmu.h | 24 +++++++++++++++----- > 2 files changed, 59 insertions(+), 13 deletions(-) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index a6a5796e9c41..db6d503c1673 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -555,11 +555,16 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain, > cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; > cb->ttbr[1] = 0; > } else { > - cb->ttbr[0] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; > - cb->ttbr[0] |= FIELD_PREP(ARM_SMMU_TTBRn_ASID, > - cfg->asid); > - cb->ttbr[1] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, > - cfg->asid); > + cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, > + cfg->asid); > + > + if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) { > + cb->ttbr[1] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; > + } else { > + cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; > + cb->ttbr[1] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, > + cfg->asid); > + } This looks odd to me. As I mentioned before, the SMMU driver absolutely has to manage the ASID space, so we should be setting it in both TTBRs here. > diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h > index 8d1cd54d82a6..5f6d0af7c8c8 100644 > --- a/drivers/iommu/arm-smmu.h > +++ b/drivers/iommu/arm-smmu.h > @@ -172,6 +172,7 @@ enum arm_smmu_cbar_type { > #define ARM_SMMU_TCR_SH0 GENMASK(13, 12) > #define ARM_SMMU_TCR_ORGN0 GENMASK(11, 10) > #define ARM_SMMU_TCR_IRGN0 GENMASK(9, 8) > +#define ARM_SMMU_TCR_EPD0 BIT(7) > #define ARM_SMMU_TCR_T0SZ GENMASK(5, 0) > > #define ARM_SMMU_VTCR_RES1 BIT(31) > @@ -343,16 +344,27 @@ struct arm_smmu_domain { > struct mutex init_mutex; /* Protects smmu pointer */ > spinlock_t cb_lock; /* Serialises ATS1* ops and TLB syncs */ > struct iommu_domain domain; > + bool split_pagetables; > }; > > static inline u32 arm_smmu_lpae_tcr(struct io_pgtable_cfg *cfg) > { > - return ARM_SMMU_TCR_EPD1 | > - FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) | > - FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) | > - FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) | > - FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) | > - FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz); > + u32 tcr = FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) | > + FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) | > + FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) | > + FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) | > + FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz); > + > + /* > + * When TTBR1 is selected shift the TCR fields by 16 bits and disable > + * translation in TTBR0 > + */ > + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) > + tcr = (tcr << 16) | ARM_SMMU_TCR_EPD0; This looks reasonably dodgy to me, as you copy a RESERVED bit into the A1 field. Furthermore, for 32-bit context banks you've got the EAE bit to contend with as well. Perhaps we shouldn't expose DOMAIN_ATTR_SPLIT_TABLES for anything other than the 64-bit page table format. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel