From: Yangbo Lu <yangbo.lu@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Richard Cochran <richardcochran@gmail.com>,
Li Yang <leoyang.li@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
Yangbo Lu <yangbo.lu@nxp.com>
Subject: [v2] ARM: dts: ls1021a: output PPS signal on FIPER2
Date: Tue, 19 May 2020 10:53:07 +0800 [thread overview]
Message-ID: <20200519025307.628-1-yangbo.lu@nxp.com> (raw)
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse. To use the TMR_FIPER
register to generate a 1 PPS event, the value
(10^9 nanoseconds) - TCLK_PERIOD should be programmed.
It should be 999999995 since TCLK_PERIOD is 5.
This patch is to output PPS signal on FIPER2 which is more
desired by user.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v2:
- Added more discription in commit message.
---
arch/arm/boot/dts/ls1021a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c..b2ff27a 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -772,7 +772,7 @@
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xaaaaaaab>;
fsl,tmr-fiper1 = <999999995>;
- fsl,tmr-fiper2 = <99990>;
+ fsl,tmr-fiper2 = <999999995>;
fsl,max-adj = <499999999>;
fsl,extts-fifo;
};
--
2.7.4
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next reply other threads:[~2020-05-19 2:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 2:53 Yangbo Lu [this message]
2020-05-19 16:15 ` [v2] ARM: dts: ls1021a: output PPS signal on FIPER2 Richard Cochran
2020-05-22 1:37 ` Y.b. Lu
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