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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbfJG-00021C-Lv; Thu, 21 May 2020 07:08:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbfIv-0001qZ-8i for linux-arm-kernel@lists.infradead.org; Thu, 21 May 2020 07:07:46 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A4DCBD6E; Thu, 21 May 2020 00:07:43 -0700 (PDT) Received: from bogus (unknown [10.37.12.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DAF093F52E; Thu, 21 May 2020 00:07:40 -0700 (PDT) Date: Thu, 21 May 2020 08:07:38 +0100 From: Sudeep Holla To: Arnd Bergmann Subject: Re: [PATCH v4 7/7] firmware: smccc: Add ARCH_SOC_ID support Message-ID: <20200521061228.GA1131@bogus> References: <20200518091222.27467-1-sudeep.holla@arm.com> <20200518091222.27467-8-sudeep.holla@arm.com> <20200518115546.GB16262@bogus> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200521_000745_397394_CB5B6023 X-CRM114-Status: GOOD ( 22.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Lorenzo Pieralisi , Catalin Marinas , "linux-kernel@vger.kernel.org" , Steven Price , harb@amperecomputing.com, Sudeep Holla , Will Deacon , Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 20, 2020 at 11:51:47PM +0200, Arnd Bergmann wrote: > On Mon, May 18, 2020 at 1:55 PM Sudeep Holla wrote: > > > > On Mon, May 18, 2020 at 11:30:21AM +0200, Arnd Bergmann wrote: > > > On Mon, May 18, 2020 at 11:12 AM Sudeep Holla wrote: > > > > > > > +static ssize_t > > > > +jep106_cont_bank_code_show(struct device *dev, struct device_attribute *attr, > > > > + char *buf) > > > > +{ > > > > + return sprintf(buf, "0x%02x\n", JEP106_BANK_CONT_CODE(soc_id_version)); > > > > +} > > > > + > > > > +static DEVICE_ATTR_RO(jep106_cont_bank_code); > > > > + > > > > +static ssize_t > > > > +jep106_identification_code_show(struct device *dev, > > > > + struct device_attribute *attr, char *buf) > > > > +{ > > > > + return sprintf(buf, "0x%02x\n", JEP106_ID_CODE(soc_id_version)); > > > > +} > > > > > > I think we should try hard to avoid nonstandard attributes for the soc device. > > > > > > > I agree with that in general but this is bit different for below mentioned > > reason. > > > > > Did you run into a problem with finding one of the existing attributes > > > that can be used to hold the fields? > > > > > > > Not really! The 2 JEP106 codes can be used to derive the manufacturer which > > could match one of the existing attributes. However doing so might require > > importing the huge JEP106 list as it needs to be maintained and updated > > in the kernel. Also that approach will have the compatibility issue and > > that is the reason for introducing these attributes representing raw > > values for userspace. > > I was thinking they codes could just be part of the normal strings rather > than get translated. Can you give an example what they would look like > with your current code? > Sure. Couple of example: Cont Code Identifier Manufacturer 0 0x1 AMD 0 0x0e Freescale (Motorola) 4 0x3b ARM I initially thought of value like "jep106-0-1" for AMD "jep-4-3b" for ARM,..etc for the standard attribute family or machine. But I was not convinced fully on that approach as it will be deviation from normal values in those attributes. Further this represents the vendor name rather than the family or machine. > If you think they should be standard attributes, how about adding them > to the default list, and hardcoding them in the other soc device drivers > based on the information we have available there? > That may be possible, I can take a look at the existing drivers and check if that is feasible(which I think should be). Thanks for that suggestion. -- Regards, Sudeep [1] https://github.com/skottler/memtest86/blob/master/jedec_id.h _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel