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02 Jun 2020 02:53:02 -0700 Received: by paasikivi.fi.intel.com (Postfix, from userid 1000) id 7472B20A25; Tue, 2 Jun 2020 12:53:00 +0300 (EEST) Date: Tue, 2 Jun 2020 12:53:00 +0300 From: Sakari Ailus To: Tomasz Figa Subject: Re: [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings Message-ID: <20200602095300.GC29325@paasikivi.fi.intel.com> References: <20200523084103.31276-1-dongchun.zhu@mediatek.com> <20200523084103.31276-2-dongchun.zhu@mediatek.com> <20200526182847.GA92449@bogus> <1590569355.8804.448.camel@mhfsdcap03> <20200527211628.GT7618@paasikivi.fi.intel.com> <1590636882.8804.474.camel@mhfsdcap03> <20200528072332.GW7618@paasikivi.fi.intel.com> <1590653082.8804.517.camel@mhfsdcap03> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200602_025309_859928_B35B3A25 X-CRM114-Status: GOOD ( 28.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Andy Shevchenko , srv_heupstream , linux-devicetree , Linus Walleij , Shengnan Wang =?utf-8?B?KOeOi+Wco+eUtyk=?= , Bartosz Golaszewski , Sj Huang , Nicolas Boichat , "moderated list:ARM/Mediatek SoC support" , Dongchun Zhu , Louis Kuo , Matthias Brugger , Cao Bing Bu , Mauro Carvalho Chehab , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Linux Media Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 29, 2020 at 03:43:30PM +0200, Tomasz Figa wrote: > On Thu, May 28, 2020 at 10:06 AM Dongchun Zhu wrote: > > > > Hi Sakari, > > > > On Thu, 2020-05-28 at 10:23 +0300, Sakari Ailus wrote: > > > Hi Dongchun, > > > > > > On Thu, May 28, 2020 at 11:34:42AM +0800, Dongchun Zhu wrote: > > > > Hi Sakari, Rob, > > > > > > > > On Thu, 2020-05-28 at 00:16 +0300, Sakari Ailus wrote: > > > > > Hi Rob, Dongchun, > > > > > > > > > > On Wed, May 27, 2020 at 09:27:22AM -0600, Rob Herring wrote: > > > > > > > > > + properties: > > > > > > > > > + endpoint: > > > > > > > > > + type: object > > > > > > > > > + additionalProperties: false > > > > > > > > > + > > > > > > > > > + properties: > > > > > > > > > > > > > > Actually I wonder whether we need to declare 'clock-lanes' here? > > > > > > > > > > > > Yes, if you are using it. > > > > > > > > > > Dongchun, can you confirm the chip has a single data and a single clock > > > > > lane and that it does not support lane reordering? > > > > > > > > > > > > > From the datasheet, 'MIPI inside the OV02A10 provides one single > > > > uni-directional clock lane and one bi-directional data lane solution for > > > > communication links between components inside a mobile device. > > > > The data lane has full support for HS(uni-directional) and > > > > LP(bi-directional) data transfer mode.' > > > > > > > > The sensor doesn't support lane reordering, so 'clock-lanes' property > > > > would not be added in next release. > > > > > > > > > So if there's nothing to convey to the driver, also the data-lanes should > > > > > be removed IMO. > > > > > > > > > > > > > However, 'data-lanes' property may still be required. > > > > It is known that either data-lanes or clock-lanes is an array of > > > > physical data lane indexes. Position of an entry determines the logical > > > > lane number, while the value of an entry indicates physical lane, e.g., > > > > for 1-lane MIPI CSI-2 bus we could have "data-lanes = <1>;", assuming > > > > the clock lane is on hardware lane 0. > > > > > > > > As mentioned earlier, the OV02A10 sensor supports only 1C1D and does not > > > > support lane reordering, so here we shall use 'data-lanes = <1>' as > > > > there is only a clock lane for OV02A10. > > > > > > > > Reminder: > > > > If 'data-lanes' property is not present, the driver would assume > > > > four-lane operation. This means for one-lane or two-lane operation, this > > > > property must be present and set to the right physical lane indexes. > > > > If the hardware does not support lane reordering, monotonically > > > > incremented values shall be used from 0 or 1 onwards, depending on > > > > whether or not there is also a clock lane. > > > > > > How can the driver use four lanes, considering the device only supports a > > > single lane?? > > > > > > > I understood your meaning. > > If we omit the property 'data-lanes', the sensor should work still. > > But then what's the meaning of the existence of 'data-lanes'? > > If this property 'data-lanes' is always optional, then why dt-bindings > > provide the interface? > > > > In the meantime, if omitting 'data-lanes' for one sensor(transmitter) > > that has only one physical data lane, MIPI receiver(e.g., MIPI CSI-2) > > shall enable four-lane configuration, which may increase consumption of > > both power and resource in the process of IIC communication. > > Wouldn't the receiver still have the data-lanes property under its > endpoint node, telling it how many lanes and in which order should be > used? Yes. -- Sakari Ailus _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel