* [PATCH v9 1/9] mtd: nand: Create a helper to extract the ECC configuration
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 15:51 ` Boris Brezillon
2020-06-02 14:31 ` [PATCH v9 2/9] mtd: spinand: Use nanddev_get_ecc_conf() when relevant Miquel Raynal
` (8 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Despite its current name "eccreq", this object first stores data that
is meant to be the requirements, and then this data gets eventually
updated and becomes the actual configuration. Abstracting this
indirection will help us clarify the structures in a future change.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
include/linux/mtd/nand.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 2f838394b5f7..7fd0d492073b 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -512,6 +512,16 @@ nanddev_get_memorg(struct nand_device *nand)
return &nand->memorg;
}
+/**
+ * nanddev_get_ecc_conf() - Extract the ECC configuration from a NAND device
+ * @nand: NAND device
+ */
+static inline const struct nand_ecc_props *
+nanddev_get_ecc_conf(struct nand_device *nand)
+{
+ return &nand->eccreq;
+}
+
int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
struct module *owner);
void nanddev_cleanup(struct nand_device *nand);
--
2.20.1
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9 1/9] mtd: nand: Create a helper to extract the ECC configuration
2020-06-02 14:31 ` [PATCH v9 1/9] mtd: nand: Create a helper to extract the ECC configuration Miquel Raynal
@ 2020-06-02 15:51 ` Boris Brezillon
0 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 15:51 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:16 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Despite its current name "eccreq", this object first stores data that
> is meant to be the requirements, and then this data gets eventually
> updated and becomes the actual configuration.
Despite its current name, the eccreq field actually encodes both the
NAND requirements and the final ECC configuration. That works fine when
using on-die ECC since those 2 concepts match perfectly, but it starts
being a problem as soon as we use on-host ECC engines, where we're not
guaranteed to have a perfect match.
> Abstracting this
> indirection will help us clarify the structures in a future change.
Let's hide the ECC configuration access behind a helper so we can later
split those 2 concepts.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> include/linux/mtd/nand.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index 2f838394b5f7..7fd0d492073b 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -512,6 +512,16 @@ nanddev_get_memorg(struct nand_device *nand)
> return &nand->memorg;
> }
>
> +/**
> + * nanddev_get_ecc_conf() - Extract the ECC configuration from a NAND device
> + * @nand: NAND device
> + */
> +static inline const struct nand_ecc_props *
> +nanddev_get_ecc_conf(struct nand_device *nand)
> +{
> + return &nand->eccreq;
> +}
> +
> int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
> struct module *owner);
> void nanddev_cleanup(struct nand_device *nand);
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v9 2/9] mtd: spinand: Use nanddev_get_ecc_conf() when relevant
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 1/9] mtd: nand: Create a helper to extract the ECC configuration Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 3/9] mtd: nand: Create a helper to extract the ECC requirements Miquel Raynal
` (7 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Instead of accessing ->strength/step_size directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/spi/core.c | 6 +++---
drivers/mtd/nand/spi/macronix.c | 7 ++++---
drivers/mtd/nand/spi/toshiba.c | 6 +++---
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 6f6ec8aa143d..56019de28a90 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -419,7 +419,7 @@ static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
* fixed, so let's return the maximum possible value so that
* wear-leveling layers move the data immediately.
*/
- return nand->eccreq.strength;
+ return nanddev_get_ecc_conf(nand)->strength;
case STATUS_ECC_UNCOR_ERROR:
return -EBADMSG;
@@ -1091,8 +1091,8 @@ static int spinand_init(struct spinand_device *spinand)
mtd->oobavail = ret;
/* Propagate ECC information to mtd_info */
- mtd->ecc_strength = nand->eccreq.strength;
- mtd->ecc_step_size = nand->eccreq.step_size;
+ mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength;
+ mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size;
return 0;
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 0f900f3aa21a..9ff8debd5994 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -84,10 +84,11 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
* data around if it's not necessary.
*/
if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
- return nand->eccreq.strength;
+ return nanddev_get_ecc_conf(nand)->strength;
- if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
- return nand->eccreq.strength;
+ if (WARN_ON(eccsr > nanddev_get_ecc_conf(nand)->strength ||
+ !eccsr))
+ return nanddev_get_ecc_conf(nand)->strength;
return eccsr;
diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
index bc801d83343e..21fde2875674 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -90,12 +90,12 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
* data around if it's not necessary.
*/
if (spi_mem_exec_op(spinand->spimem, &op))
- return nand->eccreq.strength;
+ return nanddev_get_ecc_conf(nand)->strength;
mbf >>= 4;
- if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
- return nand->eccreq.strength;
+ if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
+ return nanddev_get_ecc_conf(nand)->strength;
return mbf;
--
2.20.1
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v9 3/9] mtd: nand: Create a helper to extract the ECC requirements
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 1/9] mtd: nand: Create a helper to extract the ECC configuration Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 2/9] mtd: spinand: Use nanddev_get_ecc_conf() when relevant Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant Miquel Raynal
` (6 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
As the structures are still mixed, this helper returns the same as
nanddev_get_ecc_conf() but this will be fixed in a later change.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
include/linux/mtd/nand.h | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 7fd0d492073b..e572d1600f63 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -522,6 +522,17 @@ nanddev_get_ecc_conf(struct nand_device *nand)
return &nand->eccreq;
}
+/**
+ * nanddev_get_ecc_requirements() - Extract the ECC requirements from a NAND
+ * device
+ * @nand: NAND device
+ */
+const struct nand_ecc_props *
+nanddev_get_ecc_requirements(struct nand_device *nand)
+{
+ return &nand->eccreq;
+}
+
int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
struct module *owner);
void nanddev_cleanup(struct nand_device *nand);
--
2.20.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (2 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 3/9] mtd: nand: Create a helper to extract the ECC requirements Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 16:00 ` Boris Brezillon
2020-06-02 14:31 ` [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework Miquel Raynal
` (5 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Instead of accessing ->strength/step_size directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 10 +++--
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++--
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 13 +++---
drivers/mtd/nand/raw/marvell_nand.c | 8 ++--
drivers/mtd/nand/raw/mtk_nand.c | 6 ++-
drivers/mtd/nand/raw/nand_base.c | 27 +++++++-----
drivers/mtd/nand/raw/nand_esmt.c | 14 ++++---
drivers/mtd/nand/raw/nand_hynix.c | 43 +++++++++++---------
drivers/mtd/nand/raw/nand_jedec.c | 7 +++-
drivers/mtd/nand/raw/nand_micron.c | 17 +++++---
drivers/mtd/nand/raw/nand_onfi.c | 14 +++++--
drivers/mtd/nand/raw/nand_samsung.c | 21 ++++++----
drivers/mtd/nand/raw/nand_toshiba.c | 13 +++---
drivers/mtd/nand/raw/sunxi_nand.c | 6 ++-
drivers/mtd/nand/raw/tegra_nand.c | 12 ++++--
drivers/mtd/nand/spi/core.c | 4 +-
include/linux/mtd/nand.h | 2 +-
17 files changed, 138 insertions(+), 87 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 85cf396731ce..3fba91d7991a 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1043,6 +1043,8 @@ static int atmel_hsmc_nand_pmecc_read_page_raw(struct nand_chip *chip,
static int atmel_nand_pmecc_init(struct nand_chip *chip)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct atmel_nand *nand = to_atmel_nand(chip);
struct atmel_nand_controller *nc;
@@ -1072,15 +1074,15 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
else if (chip->ecc.strength)
req.ecc.strength = chip->ecc.strength;
- else if (chip->base.eccreq.strength)
- req.ecc.strength = chip->base.eccreq.strength;
+ else if (requirements->strength)
+ req.ecc.strength = requirements->strength;
else
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
if (chip->ecc.size)
req.ecc.sectorsize = chip->ecc.size;
- else if (chip->base.eccreq.step_size)
- req.ecc.sectorsize = chip->base.eccreq.step_size;
+ else if (requirements->step_size)
+ req.ecc.sectorsize = requirements->step_size;
else
req.ecc.sectorsize = ATMEL_PMECC_SECTOR_SIZE_AUTO;
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 164617b33942..a774247b0caa 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2506,6 +2506,8 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
{
struct mtd_info *mtd = nand_to_mtd(&host->chip);
struct nand_chip *chip = &host->chip;
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct brcmnand_controller *ctrl = host->ctrl;
struct brcmnand_cfg *cfg = &host->hwcfg;
char msg[128];
@@ -2563,10 +2565,10 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
(!chip->ecc.size || !chip->ecc.strength)) {
- if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
+ if (requirements->step_size && requirements->strength) {
/* use detected ECC parameters */
- chip->ecc.size = chip->base.eccreq.step_size;
- chip->ecc.strength = chip->base.eccreq.strength;
+ chip->ecc.size = requirements->step_size;
+ chip->ecc.strength = requirements->strength;
dev_info(ctrl->dev, "Using ECC step-size %d, strength %d\n",
chip->ecc.size, chip->ecc.strength);
}
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index d1ea6df9fd64..2bdcbc3197f7 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -272,8 +272,8 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this,
default:
dev_err(this->dev,
"unsupported nand chip. ecc bits : %d, ecc size : %d\n",
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ nanddev_get_ecc_requirements(&chip->base)->strength,
+ nanddev_get_ecc_requirements(&chip->base)->step_size);
return -EINVAL;
}
geo->ecc_chunk_size = ecc_step;
@@ -509,6 +509,8 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)
static int common_nfc_set_geometry(struct gpmi_nand_data *this)
{
+ struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct nand_chip *chip = &this->nand;
if (chip->ecc.strength > 0 && chip->ecc.size > 0)
@@ -517,13 +519,12 @@ static int common_nfc_set_geometry(struct gpmi_nand_data *this)
if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc"))
|| legacy_set_geometry(this)) {
- if (!(chip->base.eccreq.strength > 0 &&
- chip->base.eccreq.step_size > 0))
+ if (!(requirements->strength > 0 && requirements->step_size > 0))
return -EINVAL;
return set_geometry_by_ecc_info(this,
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ requirements->strength,
+ requirements->step_size);
}
return 0;
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index f9cc03c11deb..3ed315dd7798 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2244,14 +2244,16 @@ static int marvell_nand_ecc_init(struct mtd_info *mtd,
struct nand_ecc_ctrl *ecc)
{
struct nand_chip *chip = mtd_to_nand(mtd);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
int ret;
if (ecc->engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
(!ecc->size || !ecc->strength)) {
- if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
- ecc->size = chip->base.eccreq.step_size;
- ecc->strength = chip->base.eccreq.strength;
+ if (requirements->step_size && requirements->strength) {
+ ecc->size = requirements->step_size;
+ ecc->strength = requirements->strength;
} else {
dev_info(nfc->dev,
"No minimum ECC strength, using 1b/512B\n");
diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c
index a0294c9161dd..c7b1230110d8 100644
--- a/drivers/mtd/nand/raw/mtk_nand.c
+++ b/drivers/mtd/nand/raw/mtk_nand.c
@@ -1221,6 +1221,8 @@ static int mtk_nfc_set_spare_per_sector(u32 *sps, struct mtd_info *mtd)
static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
{
struct nand_chip *nand = mtd_to_nand(mtd);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&nand->base);
struct mtk_nfc *nfc = nand_get_controller_data(nand);
u32 spare;
int free, ret;
@@ -1234,8 +1236,8 @@ static int mtk_nfc_ecc_init(struct device *dev, struct mtd_info *mtd)
/* if optional dt settings not present */
if (!nand->ecc.size || !nand->ecc.strength) {
/* use datasheet requirements */
- nand->ecc.strength = nand->base.eccreq.strength;
- nand->ecc.size = nand->base.eccreq.step_size;
+ nand->ecc.strength = requirements->strength;
+ nand->ecc.size = requirements->step_size;
/*
* align eccstrength and eccsize
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 1ce2cbe72e4c..e8e22d79f422 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4725,6 +4725,9 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type)
static bool find_full_id_nand(struct nand_chip *chip,
struct nand_flash_dev *type)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
u8 *id_data = chip->id.data;
@@ -4746,8 +4749,8 @@ static bool find_full_id_nand(struct nand_chip *chip,
memorg->pagesize *
memorg->pages_per_eraseblock);
chip->options |= type->options;
- chip->base.eccreq.strength = NAND_ECC_STRENGTH(type);
- chip->base.eccreq.step_size = NAND_ECC_STEP(type);
+ requirements->strength = NAND_ECC_STRENGTH(type);
+ requirements->step_size = NAND_ECC_STEP(type);
chip->onfi_timing_mode_default =
type->onfi_timing_mode_default;
@@ -5483,10 +5486,12 @@ static int
nand_match_ecc_req(struct nand_chip *chip,
const struct nand_ecc_caps *caps, int oobavail)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
const struct nand_ecc_step_info *stepinfo;
- int req_step = chip->base.eccreq.step_size;
- int req_strength = chip->base.eccreq.strength;
+ int req_step = requirements->step_size;
+ int req_strength = requirements->strength;
int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
int best_step, best_strength, best_ecc_bytes;
int best_ecc_bytes_total = INT_MAX;
@@ -5677,9 +5682,11 @@ static bool nand_ecc_strength_good(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = &chip->ecc;
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
int corr, ds_corr;
- if (ecc->size == 0 || chip->base.eccreq.step_size == 0)
+ if (ecc->size == 0 || requirements->step_size == 0)
/* Not enough information */
return true;
@@ -5688,10 +5695,10 @@ static bool nand_ecc_strength_good(struct nand_chip *chip)
* the correction density.
*/
corr = (mtd->writesize * ecc->strength) / ecc->size;
- ds_corr = (mtd->writesize * chip->base.eccreq.strength) /
- chip->base.eccreq.step_size;
+ ds_corr = (mtd->writesize * requirements->strength) /
+ requirements->step_size;
- return corr >= ds_corr && ecc->strength >= chip->base.eccreq.strength;
+ return corr >= ds_corr && ecc->strength >= requirements->strength;
}
static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)
@@ -5978,8 +5985,8 @@ static int nand_scan_tail(struct nand_chip *chip)
if (!nand_ecc_strength_good(chip))
pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
mtd->name, chip->ecc.strength, chip->ecc.size,
- chip->base.eccreq.strength,
- chip->base.eccreq.step_size);
+ nanddev_get_ecc_requirements(&chip->base)->strength,
+ nanddev_get_ecc_requirements(&chip->base)->step_size);
/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
diff --git a/drivers/mtd/nand/raw/nand_esmt.c b/drivers/mtd/nand/raw/nand_esmt.c
index 3338c68aaaf1..b8c92401b54f 100644
--- a/drivers/mtd/nand/raw/nand_esmt.c
+++ b/drivers/mtd/nand/raw/nand_esmt.c
@@ -10,24 +10,28 @@
static void esmt_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
+
nand_decode_ext_id(chip);
/* Extract ECC requirements from 5th id byte. */
if (chip->id.len >= 5 && nand_is_slc(chip)) {
- chip->base.eccreq.step_size = 512;
+ requirements->step_size = 512;
switch (chip->id.data[4] & 0x3) {
case 0x0:
- chip->base.eccreq.strength = 4;
+ requirements->strength = 4;
break;
case 0x1:
- chip->base.eccreq.strength = 2;
+ requirements->strength = 2;
break;
case 0x2:
- chip->base.eccreq.strength = 1;
+ requirements->strength = 1;
break;
default:
WARN(1, "Could not get ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements->step_size = 0;
break;
}
}
diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c
index 7caedaa5b9e5..d2b0debf6f5a 100644
--- a/drivers/mtd/nand/raw/nand_hynix.c
+++ b/drivers/mtd/nand/raw/nand_hynix.c
@@ -495,34 +495,37 @@ static void hynix_nand_extract_oobsize(struct nand_chip *chip,
static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
bool valid_jedecid)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
u8 ecc_level = (chip->id.data[4] >> 4) & 0x7;
if (valid_jedecid) {
/* Reference: H27UCG8T2E datasheet */
- chip->base.eccreq.step_size = 1024;
+ requirements->step_size = 1024;
switch (ecc_level) {
case 0:
- chip->base.eccreq.step_size = 0;
- chip->base.eccreq.strength = 0;
+ requirements->step_size = 0;
+ requirements->strength = 0;
break;
case 1:
- chip->base.eccreq.strength = 4;
+ requirements->strength = 4;
break;
case 2:
- chip->base.eccreq.strength = 24;
+ requirements->strength = 24;
break;
case 3:
- chip->base.eccreq.strength = 32;
+ requirements->strength = 32;
break;
case 4:
- chip->base.eccreq.strength = 40;
+ requirements->strength = 40;
break;
case 5:
- chip->base.eccreq.strength = 50;
+ requirements->strength = 50;
break;
case 6:
- chip->base.eccreq.strength = 60;
+ requirements->strength = 60;
break;
default:
/*
@@ -543,14 +546,14 @@ static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
if (nand_tech < 3) {
/* > 26nm, reference: H27UBG8T2A datasheet */
if (ecc_level < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << ecc_level;
+ requirements->step_size = 512;
+ requirements->strength = 1 << ecc_level;
} else if (ecc_level < 7) {
if (ecc_level == 5)
- chip->base.eccreq.step_size = 2048;
+ requirements->step_size = 2048;
else
- chip->base.eccreq.step_size = 1024;
- chip->base.eccreq.strength = 24;
+ requirements->step_size = 1024;
+ requirements->strength = 24;
} else {
/*
* We should never reach this case, but if that
@@ -563,14 +566,14 @@ static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
} else {
/* <= 26nm, reference: H27UBG8T2B datasheet */
if (!ecc_level) {
- chip->base.eccreq.step_size = 0;
- chip->base.eccreq.strength = 0;
+ requirements->step_size = 0;
+ requirements->strength = 0;
} else if (ecc_level < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << (ecc_level - 1);
+ requirements->step_size = 512;
+ requirements->strength = 1 << (ecc_level - 1);
} else {
- chip->base.eccreq.step_size = 1024;
- chip->base.eccreq.strength = 24 +
+ requirements->step_size = 1024;
+ requirements->strength = 24 +
(8 * (ecc_level - 5));
}
}
diff --git a/drivers/mtd/nand/raw/nand_jedec.c b/drivers/mtd/nand/raw/nand_jedec.c
index b15c42f48755..e68384da007d 100644
--- a/drivers/mtd/nand/raw/nand_jedec.c
+++ b/drivers/mtd/nand/raw/nand_jedec.c
@@ -23,6 +23,9 @@
*/
int nand_jedec_detect(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
struct nand_jedec_params *p;
@@ -120,8 +123,8 @@ int nand_jedec_detect(struct nand_chip *chip)
ecc = &p->ecc_info[0];
if (ecc->codeword_size >= 9) {
- chip->base.eccreq.strength = ecc->ecc_bits;
- chip->base.eccreq.step_size = 1 << ecc->codeword_size;
+ requirements->strength = ecc->ecc_bits;
+ requirements->step_size = 1 << ecc->codeword_size;
} else {
pr_warn("Invalid codeword size\n");
}
diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index c8ebfd8c77a1..5b4741525226 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -413,6 +413,8 @@ enum {
*/
static int micron_supports_on_die_ecc(struct nand_chip *chip)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
u8 id[5];
int ret;
@@ -425,7 +427,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
/*
* We only support on-die ECC of 4/512 or 8/512
*/
- if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8)
+ if (requirements->strength != 4 && requirements->strength != 8)
return MICRON_ON_DIE_UNSUPPORTED;
/* 0x2 means on-die ECC is available. */
@@ -466,7 +468,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
/*
* We only support on-die ECC of 4/512 or 8/512
*/
- if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8)
+ if (requirements->strength != 4 && requirements->strength != 8)
return MICRON_ON_DIE_UNSUPPORTED;
return MICRON_ON_DIE_SUPPORTED;
@@ -474,6 +476,9 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
static int micron_nand_init(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct micron_nand *micron;
int ondie;
@@ -523,7 +528,7 @@ static int micron_nand_init(struct nand_chip *chip)
* That's not needed for 8-bit ECC, because the status expose
* a better approximation of the number of bitflips in a page.
*/
- if (chip->base.eccreq.strength == 4) {
+ if (requirements->strength == 4) {
micron->ecc.rawbuf = kmalloc(mtd->writesize +
mtd->oobsize,
GFP_KERNEL);
@@ -533,16 +538,16 @@ static int micron_nand_init(struct nand_chip *chip)
}
}
- if (chip->base.eccreq.strength == 4)
+ if (requirements->strength == 4)
mtd_set_ooblayout(mtd,
µn_nand_on_die_4_ooblayout_ops);
else
mtd_set_ooblayout(mtd,
µn_nand_on_die_8_ooblayout_ops);
- chip->ecc.bytes = chip->base.eccreq.strength * 2;
+ chip->ecc.bytes = requirements->strength * 2;
chip->ecc.size = 512;
- chip->ecc.strength = chip->base.eccreq.strength;
+ chip->ecc.strength = requirements->strength;
chip->ecc.algo = NAND_ECC_ALGO_BCH;
chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c
index be3456627288..86ca381d75fd 100644
--- a/drivers/mtd/nand/raw/nand_onfi.c
+++ b/drivers/mtd/nand/raw/nand_onfi.c
@@ -34,6 +34,9 @@ u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
static int nand_flash_detect_ext_param_page(struct nand_chip *chip,
struct nand_onfi_params *p)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct onfi_ext_param_page *ep;
struct onfi_ext_section *s;
struct onfi_ext_ecc_info *ecc;
@@ -94,8 +97,8 @@ static int nand_flash_detect_ext_param_page(struct nand_chip *chip,
goto ext_out;
}
- chip->base.eccreq.strength = ecc->ecc_bits;
- chip->base.eccreq.step_size = 1 << ecc->codeword_size;
+ requirements->strength = ecc->ecc_bits;
+ requirements->step_size = 1 << ecc->codeword_size;
ret = 0;
ext_out:
@@ -139,6 +142,9 @@ static void nand_bit_wise_majority(const void **srcbufs,
*/
int nand_onfi_detect(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
struct nand_onfi_params *p = NULL, *pbuf;
@@ -265,8 +271,8 @@ int nand_onfi_detect(struct nand_chip *chip)
chip->options |= NAND_BUSWIDTH_16;
if (p->ecc_bits != 0xff) {
- chip->base.eccreq.strength = p->ecc_bits;
- chip->base.eccreq.step_size = 512;
+ requirements->strength = p->ecc_bits;
+ requirements->step_size = 512;
} else if (onfi_version >= 21 &&
(le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
diff --git a/drivers/mtd/nand/raw/nand_samsung.c b/drivers/mtd/nand/raw/nand_samsung.c
index 3a4a19e808f6..b69836aed025 100644
--- a/drivers/mtd/nand/raw/nand_samsung.c
+++ b/drivers/mtd/nand/raw/nand_samsung.c
@@ -10,6 +10,9 @@
static void samsung_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
@@ -71,23 +74,23 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
/* Extract ECC requirements from 5th id byte*/
extid = (chip->id.data[4] >> 4) & 0x07;
if (extid < 5) {
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1 << extid;
+ requirements->step_size = 512;
+ requirements->strength = 1 << extid;
} else {
- chip->base.eccreq.step_size = 1024;
+ requirements->step_size = 1024;
switch (extid) {
case 5:
- chip->base.eccreq.strength = 24;
+ requirements->strength = 24;
break;
case 6:
- chip->base.eccreq.strength = 40;
+ requirements->strength = 40;
break;
case 7:
- chip->base.eccreq.strength = 60;
+ requirements->strength = 60;
break;
default:
WARN(1, "Could not decode ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements->step_size = 0;
}
}
} else {
@@ -97,8 +100,8 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
switch (chip->id.data[1]) {
/* K9F4G08U0D-S[I|C]B0(T00) */
case 0xDC:
- chip->base.eccreq.step_size = 512;
- chip->base.eccreq.strength = 1;
+ requirements->step_size = 512;
+ requirements->strength = 1;
break;
/* K9F1G08U0E 21nm chips do not support subpage write */
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index 436ed90a90ad..8fcf40d0ba0a 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -145,6 +145,9 @@ static void toshiba_nand_benand_init(struct nand_chip *chip)
static void toshiba_nand_decode_id(struct nand_chip *chip)
{
+ struct nand_device *base = &chip->base;
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_memory_organization *memorg;
@@ -175,20 +178,20 @@ static void toshiba_nand_decode_id(struct nand_chip *chip)
* - 24nm: 8 bit ECC for each 512Byte is required.
*/
if (chip->id.len >= 6 && nand_is_slc(chip)) {
- chip->base.eccreq.step_size = 512;
+ requirements->step_size = 512;
switch (chip->id.data[5] & 0x7) {
case 0x4:
- chip->base.eccreq.strength = 1;
+ requirements->strength = 1;
break;
case 0x5:
- chip->base.eccreq.strength = 4;
+ requirements->strength = 4;
break;
case 0x6:
- chip->base.eccreq.strength = 8;
+ requirements->strength = 8;
break;
default:
WARN(1, "Could not get ECC info");
- chip->base.eccreq.step_size = 0;
+ requirements->step_size = 0;
break;
}
}
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index c6dd2e6d9ef8..490ba485e939 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1732,6 +1732,8 @@ static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
static int sunxi_nand_attach_chip(struct nand_chip *nand)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&nand->base);
struct nand_ecc_ctrl *ecc = &nand->ecc;
struct device_node *np = nand_get_flash_node(nand);
int ret;
@@ -1745,8 +1747,8 @@ static int sunxi_nand_attach_chip(struct nand_chip *nand)
nand->options |= NAND_SUBPAGE_READ;
if (!ecc->size) {
- ecc->size = nand->base.eccreq.step_size;
- ecc->strength = nand->base.eccreq.strength;
+ ecc->size = requirements->step_size;
+ ecc->strength = requirements->strength;
}
if (!ecc->size || !ecc->strength)
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index 2325b06ccc9a..fecdb7e8f9e8 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -840,6 +840,8 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
int strength_len, int bits_per_step,
int oobsize)
{
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
bool maximize = chip->ecc.options & NAND_ECC_MAXIMIZE;
int i;
@@ -855,7 +857,7 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
} else {
strength_sel = strength[i];
- if (strength_sel < chip->base.eccreq.strength)
+ if (strength_sel < requirements->strength)
continue;
}
@@ -908,6 +910,8 @@ static int tegra_nand_select_strength(struct nand_chip *chip, int oobsize)
static int tegra_nand_attach_chip(struct nand_chip *chip)
{
struct tegra_nand_controller *ctrl = to_tegra_ctrl(chip->controller);
+ const struct nand_ecc_props *requirements =
+ nanddev_get_ecc_requirements(&chip->base);
struct tegra_nand_chip *nand = to_tegra_chip(chip);
struct mtd_info *mtd = nand_to_mtd(chip);
int bits_per_step;
@@ -919,9 +923,9 @@ static int tegra_nand_attach_chip(struct nand_chip *chip)
chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
chip->ecc.size = 512;
chip->ecc.steps = mtd->writesize / chip->ecc.size;
- if (chip->base.eccreq.step_size != 512) {
+ if (requirements->step_size != 512) {
dev_err(ctrl->dev, "Unsupported step size %d\n",
- chip->base.eccreq.step_size);
+ requirements->step_size);
return -EINVAL;
}
@@ -952,7 +956,7 @@ static int tegra_nand_attach_chip(struct nand_chip *chip)
if (ret < 0) {
dev_err(ctrl->dev,
"No valid strength found, minimum %d\n",
- chip->base.eccreq.strength);
+ requirements->strength);
return ret;
}
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 56019de28a90..5600472f7691 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -890,6 +890,8 @@ int spinand_match_and_init(struct spinand_device *spinand,
{
u8 *id = spinand->id.data;
struct nand_device *nand = spinand_to_nand(spinand);
+ struct nand_ecc_props *requirements =
+ (struct nand_ecc_props *)nanddev_get_ecc_requirements(nand);
unsigned int i;
for (i = 0; i < table_size; i++) {
@@ -903,7 +905,7 @@ int spinand_match_and_init(struct spinand_device *spinand,
continue;
nand->memorg = table[i].memorg;
- nand->eccreq = table[i].eccreq;
+ *requirements = table[i].eccreq;
spinand->eccinfo = table[i].eccinfo;
spinand->flags = table[i].flags;
spinand->id.len = 1 + table[i].devid.len;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index e572d1600f63..0b89da54bef2 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -527,7 +527,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
* device
* @nand: NAND device
*/
-const struct nand_ecc_props *
+static inline const struct nand_ecc_props *
nanddev_get_ecc_requirements(struct nand_device *nand)
{
return &nand->eccreq;
--
2.20.1
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant
2020-06-02 14:31 ` [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant Miquel Raynal
@ 2020-06-02 16:00 ` Boris Brezillon
2020-06-03 10:30 ` Miquel Raynal
0 siblings, 1 reply; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:00 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:19 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index 1ce2cbe72e4c..e8e22d79f422 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -4725,6 +4725,9 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type)
> static bool find_full_id_nand(struct nand_chip *chip,
> struct nand_flash_dev *type)
> {
> + struct nand_device *base = &chip->base;
> + struct nand_ecc_props *requirements =
> + (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
Ouch, that sounds wrong. How about introducing a
nanddev_set_ecc_requirements() helper instead? The same applies to all
places where you have this cast.
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index e572d1600f63..0b89da54bef2 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -527,7 +527,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
> * device
> * @nand: NAND device
> */
> -const struct nand_ecc_props *
> +static inline const struct nand_ecc_props *
> nanddev_get_ecc_requirements(struct nand_device *nand)
Looks like this should be squashed in patch 2.
> {
> return &nand->eccreq;
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant
2020-06-02 16:00 ` Boris Brezillon
@ 2020-06-03 10:30 ` Miquel Raynal
0 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-03 10:30 UTC (permalink / raw)
To: Boris Brezillon
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
Boris Brezillon <boris.brezillon@collabora.com> wrote on Tue, 2 Jun
2020 18:00:16 +0200:
> On Tue, 2 Jun 2020 16:31:19 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
>
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index 1ce2cbe72e4c..e8e22d79f422 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -4725,6 +4725,9 @@ static inline bool is_full_id_nand(struct nand_flash_dev *type)
> > static bool find_full_id_nand(struct nand_chip *chip,
> > struct nand_flash_dev *type)
> > {
> > + struct nand_device *base = &chip->base;
> > + struct nand_ecc_props *requirements =
> > + (struct nand_ecc_props *)nanddev_get_ecc_requirements(base);
>
> Ouch, that sounds wrong. How about introducing a
> nanddev_set_ecc_requirements() helper instead? The same applies to all
> places where you have this cast.
A setter helper is very helpful here, I should have done that in the
first place.
>
> > diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> > index e572d1600f63..0b89da54bef2 100644
> > --- a/include/linux/mtd/nand.h
> > +++ b/include/linux/mtd/nand.h
> > @@ -527,7 +527,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
> > * device
> > * @nand: NAND device
> > */
> > -const struct nand_ecc_props *
> > +static inline const struct nand_ecc_props *
> > nanddev_get_ecc_requirements(struct nand_device *nand)
>
> Looks like this should be squashed in patch 2.
>
> > {
> > return &nand->eccreq;
>
Oh right.
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (3 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 4/9] mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 16:03 ` Boris Brezillon
2020-06-02 14:31 ` [PATCH v9 6/9] mtd: rawnand: Hide the generic OOB layout objects behind helpers Miquel Raynal
` (4 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Embed a generic NAND ECC high-level object in the nand_device
structure to carry all the ECC engine configuration/data.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 4 +++-
include/linux/mtd/nand.h | 12 ++++++------
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index e8e22d79f422..ed0f642be993 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5984,7 +5984,9 @@ static int nand_scan_tail(struct nand_chip *chip)
/* ECC sanity check: warn if it's too weak */
if (!nand_ecc_strength_good(chip))
pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
- mtd->name, chip->ecc.strength, chip->ecc.size,
+ mtd->name,
+ nanddev_get_ecc_conf(&chip->base)->strength,
+ nanddev_get_ecc_conf(&chip->base)->step_size,
nanddev_get_ecc_requirements(&chip->base)->strength,
nanddev_get_ecc_requirements(&chip->base)->step_size);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 0b89da54bef2..668c99c4aaa7 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -290,7 +290,7 @@ struct nand_ecc {
* struct nand_device - NAND device
* @mtd: MTD instance attached to the NAND device
* @memorg: memory layout
- * @eccreq: ECC requirements
+ * @ecc: NAND ECC object attached to the NAND device
* @rowconv: position to row address converter
* @bbt: bad block table info
* @ops: NAND operations attached to the NAND device
@@ -298,8 +298,8 @@ struct nand_ecc {
* Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND)
* should declare their own NAND object embedding a nand_device struct (that's
* how inheritance is done).
- * struct_nand_device->memorg and struct_nand_device->eccreq should be filled
- * at device detection time to reflect the NAND device
+ * struct_nand_device->memorg and struct_nand_device->ecc.requirements should
+ * be filled at device detection time to reflect the NAND device
* capabilities/requirements. Once this is done nanddev_init() can be called.
* It will take care of converting NAND information into MTD ones, which means
* the specialized NAND layers should never manually tweak
@@ -308,7 +308,7 @@ struct nand_ecc {
struct nand_device {
struct mtd_info mtd;
struct nand_memory_organization memorg;
- struct nand_ecc_props eccreq;
+ struct nand_ecc ecc;
struct nand_row_converter rowconv;
struct nand_bbt bbt;
const struct nand_ops *ops;
@@ -519,7 +519,7 @@ nanddev_get_memorg(struct nand_device *nand)
static inline const struct nand_ecc_props *
nanddev_get_ecc_conf(struct nand_device *nand)
{
- return &nand->eccreq;
+ return &nand->ecc.ctx.conf;
}
/**
@@ -530,7 +530,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
static inline const struct nand_ecc_props *
nanddev_get_ecc_requirements(struct nand_device *nand)
{
- return &nand->eccreq;
+ return &nand->ecc.requirements;
}
int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
--
2.20.1
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework
2020-06-02 14:31 ` [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework Miquel Raynal
@ 2020-06-02 16:03 ` Boris Brezillon
2020-06-03 10:29 ` Miquel Raynal
0 siblings, 1 reply; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:03 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:20 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Embed a generic NAND ECC high-level object in the nand_device
> structure to carry all the ECC engine configuration/data.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/nand_base.c | 4 +++-
> include/linux/mtd/nand.h | 12 ++++++------
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index e8e22d79f422..ed0f642be993 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -5984,7 +5984,9 @@ static int nand_scan_tail(struct nand_chip *chip)
> /* ECC sanity check: warn if it's too weak */
> if (!nand_ecc_strength_good(chip))
> pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
> - mtd->name, chip->ecc.strength, chip->ecc.size,
> + mtd->name,
> + nanddev_get_ecc_conf(&chip->base)->strength,
> + nanddev_get_ecc_conf(&chip->base)->step_size,
Hm, are you sure all places using chip->ecc.{strength,size} have been
patched to use nanddev_get_ecc_conf()?
> nanddev_get_ecc_requirements(&chip->base)->strength,
> nanddev_get_ecc_requirements(&chip->base)->step_size);
>
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index 0b89da54bef2..668c99c4aaa7 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -290,7 +290,7 @@ struct nand_ecc {
> * struct nand_device - NAND device
> * @mtd: MTD instance attached to the NAND device
> * @memorg: memory layout
> - * @eccreq: ECC requirements
> + * @ecc: NAND ECC object attached to the NAND device
> * @rowconv: position to row address converter
> * @bbt: bad block table info
> * @ops: NAND operations attached to the NAND device
> @@ -298,8 +298,8 @@ struct nand_ecc {
> * Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND)
> * should declare their own NAND object embedding a nand_device struct (that's
> * how inheritance is done).
> - * struct_nand_device->memorg and struct_nand_device->eccreq should be filled
> - * at device detection time to reflect the NAND device
> + * struct_nand_device->memorg and struct_nand_device->ecc.requirements should
> + * be filled at device detection time to reflect the NAND device
> * capabilities/requirements. Once this is done nanddev_init() can be called.
> * It will take care of converting NAND information into MTD ones, which means
> * the specialized NAND layers should never manually tweak
> @@ -308,7 +308,7 @@ struct nand_ecc {
> struct nand_device {
> struct mtd_info mtd;
> struct nand_memory_organization memorg;
> - struct nand_ecc_props eccreq;
> + struct nand_ecc ecc;
> struct nand_row_converter rowconv;
> struct nand_bbt bbt;
> const struct nand_ops *ops;
> @@ -519,7 +519,7 @@ nanddev_get_memorg(struct nand_device *nand)
> static inline const struct nand_ecc_props *
> nanddev_get_ecc_conf(struct nand_device *nand)
> {
> - return &nand->eccreq;
> + return &nand->ecc.ctx.conf;
> }
>
> /**
> @@ -530,7 +530,7 @@ nanddev_get_ecc_conf(struct nand_device *nand)
> static inline const struct nand_ecc_props *
> nanddev_get_ecc_requirements(struct nand_device *nand)
> {
> - return &nand->eccreq;
> + return &nand->ecc.requirements;
> }
>
> int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework
2020-06-02 16:03 ` Boris Brezillon
@ 2020-06-03 10:29 ` Miquel Raynal
0 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-03 10:29 UTC (permalink / raw)
To: Boris Brezillon
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
Boris Brezillon <boris.brezillon@collabora.com> wrote on Tue, 2 Jun
2020 18:03:20 +0200:
> On Tue, 2 Jun 2020 16:31:20 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> > Embed a generic NAND ECC high-level object in the nand_device
> > structure to carry all the ECC engine configuration/data.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/mtd/nand/raw/nand_base.c | 4 +++-
> > include/linux/mtd/nand.h | 12 ++++++------
> > 2 files changed, 9 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index e8e22d79f422..ed0f642be993 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -5984,7 +5984,9 @@ static int nand_scan_tail(struct nand_chip *chip)
> > /* ECC sanity check: warn if it's too weak */
> > if (!nand_ecc_strength_good(chip))
> > pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
> > - mtd->name, chip->ecc.strength, chip->ecc.size,
> > + mtd->name,
> > + nanddev_get_ecc_conf(&chip->base)->strength,
> > + nanddev_get_ecc_conf(&chip->base)->step_size,
>
> Hm, are you sure all places using chip->ecc.{strength,size} have been
> patched to use nanddev_get_ecc_conf()?
Not yet, I thought I removed this change but apparently not. I will
drop this.
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v9 6/9] mtd: rawnand: Hide the generic OOB layout objects behind helpers
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (4 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 5/9] mtd: nand: Convert generic NAND bits to use the ECC framework Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 16:05 ` Boris Brezillon
2020-06-02 14:31 ` [PATCH v9 7/9] mtd: rawnand: Write a compatibility layer Miquel Raynal
` (3 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Stop exposing these objects, create helpers to retrieve them instead.
Also export an helper for the Hamming large page ops for later use.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/arasan-nand-controller.c | 2 +-
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
drivers/mtd/nand/raw/davinci_nand.c | 3 +-
.../mtd/nand/raw/ingenic/ingenic_nand_drv.c | 6 ++--
drivers/mtd/nand/raw/nand_base.c | 35 ++++++++++++++-----
drivers/mtd/nand/raw/nand_toshiba.c | 2 +-
drivers/mtd/nand/raw/vf610_nfc.c | 2 +-
include/linux/mtd/rawnand.h | 5 +--
8 files changed, 38 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
index a0b5c539ca73..6fe61393bd26 100644
--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -980,7 +980,7 @@ static int anfc_init_hw_ecc_controller(struct arasan_nfc *nfc,
return -EINVAL;
}
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
ecc->steps = mtd->writesize / ecc->size;
ecc->algo = NAND_ECC_ALGO_BCH;
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 3fba91d7991a..08df7f23b859 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1108,7 +1108,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
chip->options |= NAND_NO_SUBPAGE_WRITE;
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
return 0;
}
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 58966a9706b1..427f320fb79b 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -645,7 +645,8 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
mtd_set_ooblayout(mtd,
&hwecc4_small_ooblayout_ops);
} else if (chunks == 4 || chunks == 8) {
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd,
+ nand_get_large_page_ooblayout());
info->chip.ecc.read_page = nand_davinci_read_page_hwecc_oob_first;
} else {
return -EIO;
diff --git a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
index 70309f18124c..0e9d426fe4f2 100644
--- a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
+++ b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
@@ -243,8 +243,10 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
/* For legacy reasons we use a different layout on the qi,lb60 board. */
if (of_machine_is_compatible("qi,lb60"))
mtd_set_ooblayout(mtd, &qi_lb60_ooblayout_ops);
- else
+ else if (nfc->soc_info->oob_layout)
mtd_set_ooblayout(mtd, nfc->soc_info->oob_layout);
+ else
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
return 0;
}
@@ -532,7 +534,6 @@ static const struct jz_soc_info jz4740_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00008000,
.addr_offset = 0x00010000,
- .oob_layout = &nand_ooblayout_lp_ops,
};
static const struct jz_soc_info jz4725b_soc_info = {
@@ -546,7 +547,6 @@ static const struct jz_soc_info jz4780_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00400000,
.addr_offset = 0x00800000,
- .oob_layout = &nand_ooblayout_lp_ops,
};
static const struct of_device_id ingenic_nand_dt_match[] = {
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index ed0f642be993..f120b0b4f591 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -95,11 +95,16 @@ static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
return 0;
}
-const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
+static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
.ecc = nand_ooblayout_ecc_sp,
.free = nand_ooblayout_free_sp,
};
-EXPORT_SYMBOL_GPL(nand_ooblayout_sp_ops);
+
+const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
+{
+ return &nand_ooblayout_sp_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
@@ -131,11 +136,16 @@ static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
return 0;
}
-const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
+static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
.ecc = nand_ooblayout_ecc_lp,
.free = nand_ooblayout_free_lp,
};
-EXPORT_SYMBOL_GPL(nand_ooblayout_lp_ops);
+
+const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
+{
+ return &nand_ooblayout_lp_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
/*
* Support the old "large page" layout used for 1-bit Hamming ECC where ECC
@@ -205,6 +215,12 @@ static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
.free = nand_ooblayout_free_lp_hamming,
};
+const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
+{
+ return &nand_ooblayout_lp_hamming_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
+
static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
struct mtd_pairing_info *info)
{
@@ -5382,7 +5398,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
return -EINVAL;
}
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
}
@@ -5391,7 +5407,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
* used, otherwise we don't know how many bytes can really be
* used.
*/
- if (mtd->ooblayout == &nand_ooblayout_lp_ops &&
+ if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
ecc->options & NAND_ECC_MAXIMIZE) {
int steps, bytes;
@@ -5793,11 +5809,12 @@ static int nand_scan_tail(struct nand_chip *chip)
switch (mtd->oobsize) {
case 8:
case 16:
- mtd_set_ooblayout(mtd, &nand_ooblayout_sp_ops);
+ mtd_set_ooblayout(mtd, nand_get_small_page_ooblayout());
break;
case 64:
case 128:
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_hamming_ops);
+ mtd_set_ooblayout(mtd,
+ nand_get_large_page_hamming_ooblayout());
break;
default:
/*
@@ -5809,7 +5826,7 @@ static int nand_scan_tail(struct nand_chip *chip)
*/
if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
mtd_set_ooblayout(mtd,
- &nand_ooblayout_lp_ops);
+ nand_get_large_page_ooblayout());
break;
}
diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
index 8fcf40d0ba0a..3174914e33e0 100644
--- a/drivers/mtd/nand/raw/nand_toshiba.c
+++ b/drivers/mtd/nand/raw/nand_toshiba.c
@@ -140,7 +140,7 @@ static void toshiba_nand_benand_init(struct nand_chip *chip)
chip->options |= NAND_SUBPAGE_READ;
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
}
static void toshiba_nand_decode_id(struct nand_chip *chip)
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 8ee2c1f539c4..50dc0c93140c 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -779,7 +779,7 @@ static int vf610_nfc_attach_chip(struct nand_chip *chip)
mtd->oobsize = 64;
/* Use default large page ECC layout defined in NAND core */
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
if (chip->ecc.strength == 32) {
nfc->ecc_mode = ECC_60_BYTE;
chip->ecc.bytes = 60;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 8f7f1cce3b4b..f3eb47c09e57 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1159,8 +1159,9 @@ struct nand_chip {
int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
};
-extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops;
-extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops;
+const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void);
+const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void);
+const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void);
static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
{
--
2.20.1
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9 6/9] mtd: rawnand: Hide the generic OOB layout objects behind helpers
2020-06-02 14:31 ` [PATCH v9 6/9] mtd: rawnand: Hide the generic OOB layout objects behind helpers Miquel Raynal
@ 2020-06-02 16:05 ` Boris Brezillon
0 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:05 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:21 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Stop exposing these objects, create helpers to retrieve them instead.
>
> Also export an helper for the Hamming large page ops for later use.
I'd do that in a separate patch.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
> drivers/mtd/nand/raw/arasan-nand-controller.c | 2 +-
> drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
> drivers/mtd/nand/raw/davinci_nand.c | 3 +-
> .../mtd/nand/raw/ingenic/ingenic_nand_drv.c | 6 ++--
> drivers/mtd/nand/raw/nand_base.c | 35 ++++++++++++++-----
> drivers/mtd/nand/raw/nand_toshiba.c | 2 +-
> drivers/mtd/nand/raw/vf610_nfc.c | 2 +-
> include/linux/mtd/rawnand.h | 5 +--
> 8 files changed, 38 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c
> index a0b5c539ca73..6fe61393bd26 100644
> --- a/drivers/mtd/nand/raw/arasan-nand-controller.c
> +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
> @@ -980,7 +980,7 @@ static int anfc_init_hw_ecc_controller(struct arasan_nfc *nfc,
> return -EINVAL;
> }
>
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
>
> ecc->steps = mtd->writesize / ecc->size;
> ecc->algo = NAND_ECC_ALGO_BCH;
> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
> index 3fba91d7991a..08df7f23b859 100644
> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> @@ -1108,7 +1108,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
>
> chip->options |= NAND_NO_SUBPAGE_WRITE;
>
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
>
> return 0;
> }
> diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
> index 58966a9706b1..427f320fb79b 100644
> --- a/drivers/mtd/nand/raw/davinci_nand.c
> +++ b/drivers/mtd/nand/raw/davinci_nand.c
> @@ -645,7 +645,8 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
> mtd_set_ooblayout(mtd,
> &hwecc4_small_ooblayout_ops);
> } else if (chunks == 4 || chunks == 8) {
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd,
> + nand_get_large_page_ooblayout());
> info->chip.ecc.read_page = nand_davinci_read_page_hwecc_oob_first;
> } else {
> return -EIO;
> diff --git a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
> index 70309f18124c..0e9d426fe4f2 100644
> --- a/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
> +++ b/drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c
> @@ -243,8 +243,10 @@ static int ingenic_nand_attach_chip(struct nand_chip *chip)
> /* For legacy reasons we use a different layout on the qi,lb60 board. */
> if (of_machine_is_compatible("qi,lb60"))
> mtd_set_ooblayout(mtd, &qi_lb60_ooblayout_ops);
> - else
> + else if (nfc->soc_info->oob_layout)
> mtd_set_ooblayout(mtd, nfc->soc_info->oob_layout);
> + else
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
>
> return 0;
> }
> @@ -532,7 +534,6 @@ static const struct jz_soc_info jz4740_soc_info = {
> .data_offset = 0x00000000,
> .cmd_offset = 0x00008000,
> .addr_offset = 0x00010000,
> - .oob_layout = &nand_ooblayout_lp_ops,
> };
>
> static const struct jz_soc_info jz4725b_soc_info = {
> @@ -546,7 +547,6 @@ static const struct jz_soc_info jz4780_soc_info = {
> .data_offset = 0x00000000,
> .cmd_offset = 0x00400000,
> .addr_offset = 0x00800000,
> - .oob_layout = &nand_ooblayout_lp_ops,
> };
>
> static const struct of_device_id ingenic_nand_dt_match[] = {
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index ed0f642be993..f120b0b4f591 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -95,11 +95,16 @@ static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
> return 0;
> }
>
> -const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
> +static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
> .ecc = nand_ooblayout_ecc_sp,
> .free = nand_ooblayout_free_sp,
> };
> -EXPORT_SYMBOL_GPL(nand_ooblayout_sp_ops);
> +
> +const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
> +{
> + return &nand_ooblayout_sp_ops;
> +}
> +EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
>
> static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
> struct mtd_oob_region *oobregion)
> @@ -131,11 +136,16 @@ static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
> return 0;
> }
>
> -const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
> +static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
> .ecc = nand_ooblayout_ecc_lp,
> .free = nand_ooblayout_free_lp,
> };
> -EXPORT_SYMBOL_GPL(nand_ooblayout_lp_ops);
> +
> +const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
> +{
> + return &nand_ooblayout_lp_ops;
> +}
> +EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
>
> /*
> * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
> @@ -205,6 +215,12 @@ static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
> .free = nand_ooblayout_free_lp_hamming,
> };
>
> +const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
> +{
> + return &nand_ooblayout_lp_hamming_ops;
> +}
> +EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
> +
> static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
> struct mtd_pairing_info *info)
> {
> @@ -5382,7 +5398,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
> return -EINVAL;
> }
>
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
>
> }
>
> @@ -5391,7 +5407,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
> * used, otherwise we don't know how many bytes can really be
> * used.
> */
> - if (mtd->ooblayout == &nand_ooblayout_lp_ops &&
> + if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
> ecc->options & NAND_ECC_MAXIMIZE) {
> int steps, bytes;
>
> @@ -5793,11 +5809,12 @@ static int nand_scan_tail(struct nand_chip *chip)
> switch (mtd->oobsize) {
> case 8:
> case 16:
> - mtd_set_ooblayout(mtd, &nand_ooblayout_sp_ops);
> + mtd_set_ooblayout(mtd, nand_get_small_page_ooblayout());
> break;
> case 64:
> case 128:
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_hamming_ops);
> + mtd_set_ooblayout(mtd,
> + nand_get_large_page_hamming_ooblayout());
> break;
> default:
> /*
> @@ -5809,7 +5826,7 @@ static int nand_scan_tail(struct nand_chip *chip)
> */
> if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
> mtd_set_ooblayout(mtd,
> - &nand_ooblayout_lp_ops);
> + nand_get_large_page_ooblayout());
> break;
> }
>
> diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
> index 8fcf40d0ba0a..3174914e33e0 100644
> --- a/drivers/mtd/nand/raw/nand_toshiba.c
> +++ b/drivers/mtd/nand/raw/nand_toshiba.c
> @@ -140,7 +140,7 @@ static void toshiba_nand_benand_init(struct nand_chip *chip)
>
> chip->options |= NAND_SUBPAGE_READ;
>
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
> }
>
> static void toshiba_nand_decode_id(struct nand_chip *chip)
> diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
> index 8ee2c1f539c4..50dc0c93140c 100644
> --- a/drivers/mtd/nand/raw/vf610_nfc.c
> +++ b/drivers/mtd/nand/raw/vf610_nfc.c
> @@ -779,7 +779,7 @@ static int vf610_nfc_attach_chip(struct nand_chip *chip)
> mtd->oobsize = 64;
>
> /* Use default large page ECC layout defined in NAND core */
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nand_get_large_page_ooblayout());
> if (chip->ecc.strength == 32) {
> nfc->ecc_mode = ECC_60_BYTE;
> chip->ecc.bytes = 60;
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 8f7f1cce3b4b..f3eb47c09e57 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -1159,8 +1159,9 @@ struct nand_chip {
> int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
> };
>
> -extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops;
> -extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops;
> +const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void);
> +const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void);
> +const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void);
>
> static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
> {
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v9 7/9] mtd: rawnand: Write a compatibility layer
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (5 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 6/9] mtd: rawnand: Hide the generic OOB layout objects behind helpers Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 8/9] mtd: rawnand: Move generic OOB layouts to the ECC framework Miquel Raynal
` (2 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Before moving generic bits from the raw NAND core to the generic NAND
core, let's disociate clearly what is a rawnand legacy property, and
what should be made public to other NAND users.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/raw/nand_base.c | 158 +++++++++++++++++++++----------
include/linux/mtd/rawnand.h | 12 ---
2 files changed, 107 insertions(+), 63 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index f120b0b4f591..8dc230892b90 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5029,14 +5029,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
return ret;
}
-static const char * const nand_ecc_modes[] = {
- [NAND_ECC_NONE] = "none",
- [NAND_ECC_SOFT] = "soft",
- [NAND_ECC_HW] = "hw",
- [NAND_ECC_HW_SYNDROME] = "hw_syndrome",
- [NAND_ECC_ON_DIE] = "on-die",
-};
-
static const char * const nand_ecc_placement[] = {
[NAND_ECC_PLACEMENT_OOB] = "oob",
[NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
@@ -5045,7 +5037,30 @@ static const char * const nand_ecc_placement[] = {
static enum nand_ecc_engine_type
of_get_nand_ecc_engine_type(struct device_node *np)
{
- enum nand_ecc_mode eng_type;
+ return NAND_ECC_ENGINE_TYPE_INVALID;
+}
+
+static enum nand_ecc_engine_type
+of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
+{
+ enum nand_ecc_legacy_mode {
+ NAND_ECC_INVALID,
+ NAND_ECC_NONE,
+ NAND_ECC_SOFT,
+ NAND_ECC_SOFT_BCH,
+ NAND_ECC_HW,
+ NAND_ECC_HW_SYNDROME,
+ NAND_ECC_ON_DIE,
+ };
+ const char * const nand_ecc_legacy_modes[] = {
+ [NAND_ECC_NONE] = "none",
+ [NAND_ECC_SOFT] = "soft",
+ [NAND_ECC_SOFT_BCH] = "soft_bch",
+ [NAND_ECC_HW] = "hw",
+ [NAND_ECC_HW_SYNDROME] = "hw_syndrome",
+ [NAND_ECC_ON_DIE] = "on-die",
+ };
+ enum nand_ecc_legacy_mode eng_type;
const char *pm;
int err;
@@ -5054,12 +5069,13 @@ of_get_nand_ecc_engine_type(struct device_node *np)
return NAND_ECC_ENGINE_TYPE_INVALID;
for (eng_type = NAND_ECC_NONE;
- eng_type < ARRAY_SIZE(nand_ecc_modes); eng_type++) {
- if (!strcasecmp(pm, nand_ecc_modes[eng_type])) {
+ eng_type < ARRAY_SIZE(nand_ecc_legacy_modes); eng_type++) {
+ if (!strcasecmp(pm, nand_ecc_legacy_modes[eng_type])) {
switch (eng_type) {
case NAND_ECC_NONE:
return NAND_ECC_ENGINE_TYPE_NONE;
case NAND_ECC_SOFT:
+ case NAND_ECC_SOFT_BCH:
return NAND_ECC_ENGINE_TYPE_SOFT;
case NAND_ECC_HW:
case NAND_ECC_HW_SYNDROME:
@@ -5072,14 +5088,6 @@ of_get_nand_ecc_engine_type(struct device_node *np)
}
}
- /*
- * For backward compatibility we support few obsoleted values that don't
- * have their mappings into the nand_ecc_engine_providers enum anymore
- * (they were merged with other enums).
- */
- if (!strcasecmp(pm, "soft_bch"))
- return NAND_ECC_ENGINE_TYPE_SOFT;
-
return NAND_ECC_ENGINE_TYPE_INVALID;
}
@@ -5091,17 +5099,22 @@ enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
err = of_property_read_string(np, "nand-ecc-placement", &pm);
if (!err) {
- for (placement = NAND_ECC_PLACEMENT_INTERLEAVED;
+ for (placement = NAND_ECC_PLACEMENT_OOB;
placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
if (!strcasecmp(pm, nand_ecc_placement[placement]))
return placement;
}
}
- /*
- * For backward compatibility we support few obsoleted values that don't
- * have their mappings into the nand_ecc_placement enum anymore.
- */
+ return NAND_ECC_PLACEMENT_UNKNOWN;
+}
+
+enum nand_ecc_placement
+of_get_rawnand_ecc_placement_legacy(struct device_node *np)
+{
+ const char *pm;
+ int err;
+
err = of_property_read_string(np, "nand-ecc-mode", &pm);
if (!err) {
if (!strcasecmp(pm, "hw_syndrome"))
@@ -5133,10 +5146,14 @@ static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
}
}
- /*
- * For backward compatibility we also read "nand-ecc-mode" checking
- * for some obsoleted values that were specifying ECC algorithm.
- */
+ return NAND_ECC_ALGO_UNKNOWN;
+}
+
+static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
+{
+ const char *pm;
+ int err;
+
err = of_property_read_string(np, "nand-ecc-mode", &pm);
if (!err) {
if (!strcasecmp(pm, "soft"))
@@ -5166,6 +5183,41 @@ static int of_get_nand_ecc_strength(struct device_node *np)
return ret ? ret : val;
}
+static void nand_ecc_read_user_conf(struct nand_chip *chip)
+{
+ struct device_node *dn = nand_get_flash_node(chip);
+ struct nand_device *nand = &chip->base;
+ int strength, size;
+
+ nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
+ nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
+ nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
+
+ strength = of_get_nand_ecc_strength(dn);
+ if (strength >= 0)
+ nand->ecc.user_conf.strength = strength;
+
+ size = of_get_nand_ecc_step_size(dn);
+ if (size >= 0)
+ nand->ecc.user_conf.step_size = size;
+}
+
+static void rawnand_ecc_read_legacy_user_conf(struct nand_chip *chip)
+{
+ struct device_node *dn = nand_get_flash_node(chip);
+ struct nand_device *nand = &chip->base;
+ struct nand_ecc_props *user_conf = &nand->ecc.user_conf;
+
+ if (user_conf->engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
+ user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn);
+
+ if (user_conf->algo != NAND_ECC_ALGO_UNKNOWN)
+ user_conf->algo = of_get_rawnand_ecc_algo_legacy(dn);
+
+ if (user_conf->placement != NAND_ECC_PLACEMENT_UNKNOWN)
+ user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn);
+}
+
static int of_get_nand_bus_width(struct device_node *np)
{
u32 val;
@@ -5187,12 +5239,10 @@ static bool of_get_nand_on_flash_bbt(struct device_node *np)
return of_property_read_bool(np, "nand-on-flash-bbt");
}
-static int nand_dt_init(struct nand_chip *chip)
+static int rawnand_dt_init(struct nand_chip *chip)
{
+ struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip));
struct device_node *dn = nand_get_flash_node(chip);
- enum nand_ecc_engine_type ecc_type;
- enum nand_ecc_algo ecc_algo;
- int ecc_strength, ecc_step;
if (!dn)
return 0;
@@ -5206,27 +5256,33 @@ static int nand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- ecc_type = of_get_nand_ecc_engine_type(dn);
- ecc_algo = of_get_nand_ecc_algo(dn);
- chip->ecc.placement = of_get_nand_ecc_placement(dn);
- ecc_strength = of_get_nand_ecc_strength(dn);
- ecc_step = of_get_nand_ecc_step_size(dn);
-
- if (ecc_type != NAND_ECC_ENGINE_TYPE_INVALID)
- chip->ecc.engine_type = ecc_type;
-
- if (ecc_algo != NAND_ECC_ALGO_UNKNOWN)
- chip->ecc.algo = ecc_algo;
-
- if (ecc_strength >= 0)
- chip->ecc.strength = ecc_strength;
-
- if (ecc_step > 0)
- chip->ecc.size = ecc_step;
-
if (of_property_read_bool(dn, "nand-ecc-maximize"))
chip->ecc.options |= NAND_ECC_MAXIMIZE;
+ nand_ecc_read_user_conf(chip);
+ rawnand_ecc_read_legacy_user_conf(chip);
+
+ /*
+ * If neither the user nor the NAND controller have requested a specific
+ * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST.
+ */
+ nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
+
+ /*
+ * Use the user requested engine type, unless there is none, in this
+ * case default to the NAND controller choice, otherwise fallback to
+ * the raw NAND default one.
+ */
+ if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
+ chip->ecc.engine_type = nand->ecc.user_conf.engine_type;
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
+ chip->ecc.engine_type = nand->ecc.defaults.engine_type;
+
+ chip->ecc.placement = nand->ecc.user_conf.placement;
+ chip->ecc.algo = nand->ecc.user_conf.algo;
+ chip->ecc.strength = nand->ecc.user_conf.strength;
+ chip->ecc.size = nand->ecc.user_conf.step_size;
+
return 0;
}
@@ -5263,7 +5319,7 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips,
/* Enforce the right timings for reset/detection */
onfi_fill_data_interface(chip, NAND_SDR_IFACE, 0);
- ret = nand_dt_init(chip);
+ ret = rawnand_dt_init(chip);
if (ret)
return ret;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index f3eb47c09e57..b455cb22168f 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -80,18 +80,6 @@ struct nand_chip;
#define NAND_DATA_IFACE_CHECK_ONLY -1
-/*
- * Constants for ECC_MODES
- */
-enum nand_ecc_mode {
- NAND_ECC_INVALID,
- NAND_ECC_NONE,
- NAND_ECC_SOFT,
- NAND_ECC_HW,
- NAND_ECC_HW_SYNDROME,
- NAND_ECC_ON_DIE,
-};
-
/*
* Constants for Hardware ECC
*/
--
2.20.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v9 8/9] mtd: rawnand: Move generic OOB layouts to the ECC framework
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (6 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 7/9] mtd: rawnand: Write a compatibility layer Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 14:31 ` [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits " Miquel Raynal
2020-06-02 16:33 ` [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Boris Brezillon
9 siblings, 0 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
These layouts can be used by any driver, move them to the ECC core.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/ecc.c | 176 ++++++++++++++++++++++++++++++
drivers/mtd/nand/raw/Kconfig | 1 +
drivers/mtd/nand/raw/nand_base.c | 177 +------------------------------
include/linux/mtd/nand.h | 4 +
include/linux/mtd/rawnand.h | 5 +-
5 files changed, 183 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/nand/ecc.c b/drivers/mtd/nand/ecc.c
index f7300ba37167..ad08a047dfc5 100644
--- a/drivers/mtd/nand/ecc.c
+++ b/drivers/mtd/nand/ecc.c
@@ -152,6 +152,182 @@ int nand_ecc_finish_io_req(struct nand_device *nand,
}
EXPORT_SYMBOL(nand_ecc_finish_io_req);
+/* Define default oob placement schemes for large and small page devices */
+static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+ unsigned int total_ecc_bytes = nand->ecc.ctx.total;
+
+ if (section > 1)
+ return -ERANGE;
+
+ if (!section) {
+ oobregion->offset = 0;
+ if (mtd->oobsize == 16)
+ oobregion->length = 4;
+ else
+ oobregion->length = 3;
+ } else {
+ if (mtd->oobsize == 8)
+ return -ERANGE;
+
+ oobregion->offset = 6;
+ oobregion->length = total_ecc_bytes - 4;
+ }
+
+ return 0;
+}
+
+static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ if (section > 1)
+ return -ERANGE;
+
+ if (mtd->oobsize == 16) {
+ if (section)
+ return -ERANGE;
+
+ oobregion->length = 8;
+ oobregion->offset = 8;
+ } else {
+ oobregion->length = 2;
+ if (!section)
+ oobregion->offset = 3;
+ else
+ oobregion->offset = 6;
+ }
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
+ .ecc = nand_ooblayout_ecc_sp,
+ .free = nand_ooblayout_free_sp,
+};
+
+const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
+{
+ return &nand_ooblayout_sp_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
+
+static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+ unsigned int total_ecc_bytes = nand->ecc.ctx.total;
+
+ if (section || !total_ecc_bytes)
+ return -ERANGE;
+
+ oobregion->length = total_ecc_bytes;
+ oobregion->offset = mtd->oobsize - oobregion->length;
+
+ return 0;
+}
+
+static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+ unsigned int total_ecc_bytes = nand->ecc.ctx.total;
+
+ if (section)
+ return -ERANGE;
+
+ oobregion->length = mtd->oobsize - total_ecc_bytes - 2;
+ oobregion->offset = 2;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
+ .ecc = nand_ooblayout_ecc_lp,
+ .free = nand_ooblayout_free_lp,
+};
+
+const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
+{
+ return &nand_ooblayout_lp_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
+
+/*
+ * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
+ * are placed at a fixed offset.
+ */
+static int nand_ooblayout_ecc_lp_hamming(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+ unsigned int total_ecc_bytes = nand->ecc.ctx.total;
+
+ if (section)
+ return -ERANGE;
+
+ switch (mtd->oobsize) {
+ case 64:
+ oobregion->offset = 40;
+ break;
+ case 128:
+ oobregion->offset = 80;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ oobregion->length = total_ecc_bytes;
+ if (oobregion->offset + oobregion->length > mtd->oobsize)
+ return -ERANGE;
+
+ return 0;
+}
+
+static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+ unsigned int total_ecc_bytes = nand->ecc.ctx.total;
+ int ecc_offset = 0;
+
+ if (section < 0 || section > 1)
+ return -ERANGE;
+
+ switch (mtd->oobsize) {
+ case 64:
+ ecc_offset = 40;
+ break;
+ case 128:
+ ecc_offset = 80;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (section == 0) {
+ oobregion->offset = 2;
+ oobregion->length = ecc_offset - 2;
+ } else {
+ oobregion->offset = ecc_offset + total_ecc_bytes;
+ oobregion->length = mtd->oobsize - oobregion->offset;
+ }
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
+ .ecc = nand_ooblayout_ecc_lp_hamming,
+ .free = nand_ooblayout_free_lp_hamming,
+};
+
+const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
+{
+ return &nand_ooblayout_lp_hamming_ops;
+}
+EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
+
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>");
MODULE_DESCRIPTION("Generic ECC engine");
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 85280e327bfe..6ab3184ca8eb 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -13,6 +13,7 @@ config MTD_NAND_ECC_SW_HAMMING_SMC
menuconfig MTD_RAW_NAND
tristate "Raw/Parallel NAND Device Support"
select MTD_NAND_CORE
+ select MTD_NAND_ECC
select MTD_NAND_ECC_SW_HAMMING
help
This enables support for accessing all type of raw/parallel
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 8dc230892b90..afc3506468ba 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -34,6 +34,7 @@
#include <linux/mm.h>
#include <linux/types.h>
#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/nand_bch.h>
#include <linux/interrupt.h>
@@ -45,182 +46,6 @@
#include "internals.h"
-/* Define default oob placement schemes for large and small page devices */
-static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section > 1)
- return -ERANGE;
-
- if (!section) {
- oobregion->offset = 0;
- if (mtd->oobsize == 16)
- oobregion->length = 4;
- else
- oobregion->length = 3;
- } else {
- if (mtd->oobsize == 8)
- return -ERANGE;
-
- oobregion->offset = 6;
- oobregion->length = ecc->total - 4;
- }
-
- return 0;
-}
-
-static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- if (section > 1)
- return -ERANGE;
-
- if (mtd->oobsize == 16) {
- if (section)
- return -ERANGE;
-
- oobregion->length = 8;
- oobregion->offset = 8;
- } else {
- oobregion->length = 2;
- if (!section)
- oobregion->offset = 3;
- else
- oobregion->offset = 6;
- }
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
- .ecc = nand_ooblayout_ecc_sp,
- .free = nand_ooblayout_free_sp,
-};
-
-const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
-{
- return &nand_ooblayout_sp_ops;
-}
-EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
-
-static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section || !ecc->total)
- return -ERANGE;
-
- oobregion->length = ecc->total;
- oobregion->offset = mtd->oobsize - oobregion->length;
-
- return 0;
-}
-
-static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section)
- return -ERANGE;
-
- oobregion->length = mtd->oobsize - ecc->total - 2;
- oobregion->offset = 2;
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
- .ecc = nand_ooblayout_ecc_lp,
- .free = nand_ooblayout_free_lp,
-};
-
-const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
-{
- return &nand_ooblayout_lp_ops;
-}
-EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
-
-/*
- * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
- * are placed at a fixed offset.
- */
-static int nand_ooblayout_ecc_lp_hamming(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
-
- if (section)
- return -ERANGE;
-
- switch (mtd->oobsize) {
- case 64:
- oobregion->offset = 40;
- break;
- case 128:
- oobregion->offset = 80;
- break;
- default:
- return -EINVAL;
- }
-
- oobregion->length = ecc->total;
- if (oobregion->offset + oobregion->length > mtd->oobsize)
- return -ERANGE;
-
- return 0;
-}
-
-static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
- int ecc_offset = 0;
-
- if (section < 0 || section > 1)
- return -ERANGE;
-
- switch (mtd->oobsize) {
- case 64:
- ecc_offset = 40;
- break;
- case 128:
- ecc_offset = 80;
- break;
- default:
- return -EINVAL;
- }
-
- if (section == 0) {
- oobregion->offset = 2;
- oobregion->length = ecc_offset - 2;
- } else {
- oobregion->offset = ecc_offset + ecc->total;
- oobregion->length = mtd->oobsize - oobregion->offset;
- }
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
- .ecc = nand_ooblayout_ecc_lp_hamming,
- .free = nand_ooblayout_free_lp_hamming,
-};
-
-const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
-{
- return &nand_ooblayout_lp_hamming_ops;
-}
-EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
-
static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
struct mtd_pairing_info *info)
{
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 668c99c4aaa7..817969a8a230 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -127,6 +127,10 @@ struct nand_page_io_req {
int mode;
};
+const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void);
+const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void);
+const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void);
+
/**
* enum nand_ecc_engine_type - NAND ECC engine type
* @NAND_ECC_ENGINE_TYPE_INVALID: Invalid value
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index b455cb22168f..66f69a1d27a5 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -14,6 +14,7 @@
#define __LINUX_MTD_RAWNAND_H
#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
#include <linux/mtd/flashchip.h>
#include <linux/mtd/bbm.h>
#include <linux/mtd/jedec.h>
@@ -1147,10 +1148,6 @@ struct nand_chip {
int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
};
-const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void);
-const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void);
-const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void);
-
static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
{
return container_of(mtd, struct nand_chip, base.mtd);
--
2.20.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (7 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 8/9] mtd: rawnand: Move generic OOB layouts to the ECC framework Miquel Raynal
@ 2020-06-02 14:31 ` Miquel Raynal
2020-06-02 16:18 ` Boris Brezillon
` (2 more replies)
2020-06-02 16:33 ` [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Boris Brezillon
9 siblings, 3 replies; 22+ messages in thread
From: Miquel Raynal @ 2020-06-02 14:31 UTC (permalink / raw)
To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd
Cc: Julien Su, Boris Brezillon, Thomas Petazzoni, Miquel Raynal,
Mason Yang, linux-arm-kernel
Many helpers are generic to all NAND chips, they should not be
restricted to be only used by raw NAND controller drivers. They might
later be used by generic ECC engines and SPI-NAND devices as well so
move them into a more generic place.
To avoid moving all the raw NAND core "history" into the generic NAND
layer, we already moved certain bits into legacy helpers in the raw
NAND core to ensure backward compatibility.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/ecc.c | 138 +++++++++++++++++
drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +-
drivers/mtd/nand/raw/denali.c | 3 +
drivers/mtd/nand/raw/nand_base.c | 150 ++-----------------
drivers/mtd/nand/raw/sunxi_nand.c | 3 +-
drivers/mtd/nand/raw/tegra_nand.c | 5 +-
include/linux/mtd/nand.h | 7 +
include/linux/mtd/rawnand.h | 1 -
8 files changed, 166 insertions(+), 144 deletions(-)
diff --git a/drivers/mtd/nand/ecc.c b/drivers/mtd/nand/ecc.c
index ad08a047dfc5..1ac7aaa6c6c2 100644
--- a/drivers/mtd/nand/ecc.c
+++ b/drivers/mtd/nand/ecc.c
@@ -328,6 +328,144 @@ const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
}
EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
+static enum nand_ecc_engine_type
+of_get_nand_ecc_engine_type(struct device_node *np)
+{
+ return NAND_ECC_ENGINE_TYPE_INVALID;
+}
+
+static const char * const nand_ecc_placement[] = {
+ [NAND_ECC_PLACEMENT_OOB] = "oob",
+ [NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
+};
+
+enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
+{
+ enum nand_ecc_placement placement;
+ const char *pm;
+ int err;
+
+ err = of_property_read_string(np, "nand-ecc-placement", &pm);
+ if (!err) {
+ for (placement = NAND_ECC_PLACEMENT_OOB;
+ placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
+ if (!strcasecmp(pm, nand_ecc_placement[placement]))
+ return placement;
+ }
+ }
+
+ return NAND_ECC_PLACEMENT_UNKNOWN;
+}
+
+static const char * const nand_ecc_algos[] = {
+ [NAND_ECC_ALGO_HAMMING] = "hamming",
+ [NAND_ECC_ALGO_BCH] = "bch",
+ [NAND_ECC_ALGO_RS] = "rs",
+};
+
+static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
+{
+ enum nand_ecc_algo ecc_algo;
+ const char *pm;
+ int err;
+
+ err = of_property_read_string(np, "nand-ecc-algo", &pm);
+ if (!err) {
+ for (ecc_algo = NAND_ECC_ALGO_HAMMING;
+ ecc_algo < ARRAY_SIZE(nand_ecc_algos);
+ ecc_algo++) {
+ if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
+ return ecc_algo;
+ }
+ }
+
+ return NAND_ECC_ALGO_UNKNOWN;
+}
+
+static int of_get_nand_ecc_step_size(struct device_node *np)
+{
+ int ret;
+ u32 val;
+
+ ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
+ return ret ? ret : val;
+}
+
+static int of_get_nand_ecc_strength(struct device_node *np)
+{
+ int ret;
+ u32 val;
+
+ ret = of_property_read_u32(np, "nand-ecc-strength", &val);
+ return ret ? ret : val;
+}
+
+static inline bool of_get_nand_ecc_maximize(struct device_node *np)
+{
+ return of_property_read_bool(np, "nand-ecc-maximize");
+}
+
+void nand_ecc_read_user_conf(struct nand_device *nand)
+{
+ struct device_node *dn = nanddev_get_of_node(nand);
+ int strength, size;
+
+ nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
+ nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
+ nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
+
+ strength = of_get_nand_ecc_strength(dn);
+ if (strength >= 0)
+ nand->ecc.user_conf.strength = strength;
+
+ size = of_get_nand_ecc_step_size(dn);
+ if (size >= 0)
+ nand->ecc.user_conf.step_size = size;
+
+ if (of_get_nand_ecc_maximize(dn))
+ nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE;
+}
+EXPORT_SYMBOL(nand_ecc_read_user_conf);
+
+/**
+ * nand_ecc_correction_is_enough - Check if the chip configuration meets the
+ * datasheet requirements.
+ *
+ * @nand: Device to check
+ *
+ * If our configuration corrects A bits per B bytes and the minimum
+ * required correction level is X bits per Y bytes, then we must ensure
+ * both of the following are true:
+ *
+ * (1) A / B >= X / Y
+ * (2) A >= X
+ *
+ * Requirement (1) ensures we can correct for the required bitflip density.
+ * Requirement (2) ensures we can correct even when all bitflips are clumped
+ * in the same sector.
+ */
+bool nand_ecc_correction_is_enough(struct nand_device *nand)
+{
+ const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand);
+ const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand);
+ struct mtd_info *mtd = nanddev_to_mtd(nand);
+ int corr, ds_corr;
+
+ if (conf->step_size == 0 || reqs->step_size == 0)
+ /* Not enough information */
+ return true;
+
+ /*
+ * We get the number of corrected bits per page to compare
+ * the correction density.
+ */
+ corr = (mtd->writesize * conf->strength) / conf->step_size;
+ ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size;
+
+ return corr >= ds_corr && conf->strength >= reqs->strength;
+}
+EXPORT_SYMBOL(nand_ecc_correction_is_enough);
+
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>");
MODULE_DESCRIPTION("Generic ECC engine");
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 08df7f23b859..39d8fe15b8ab 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1046,6 +1046,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
const struct nand_ecc_props *requirements =
nanddev_get_ecc_requirements(&chip->base);
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct atmel_nand *nand = to_atmel_nand(chip);
struct atmel_nand_controller *nc;
struct atmel_pmecc_user_req req;
@@ -1070,7 +1071,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
chip->ecc.size = val;
}
- if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE)
req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
else if (chip->ecc.strength)
req.ecc.strength = chip->ecc.strength;
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index a6a6464974ec..51bc014ebc0a 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1181,6 +1181,7 @@ int denali_chip_init(struct denali_controller *denali,
{
struct nand_chip *chip = &dchip->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct denali_chip *dchip2;
int i, j, ret;
@@ -1248,6 +1249,8 @@ int denali_chip_init(struct denali_controller *denali,
mtd_set_ooblayout(mtd, &denali_ooblayout_ops);
+ nanddev->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE;
+
ret = nand_scan(chip, dchip->nsels);
if (ret)
return ret;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index afc3506468ba..036e88cb52a1 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4854,17 +4854,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
return ret;
}
-static const char * const nand_ecc_placement[] = {
- [NAND_ECC_PLACEMENT_OOB] = "oob",
- [NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
-};
-
-static enum nand_ecc_engine_type
-of_get_nand_ecc_engine_type(struct device_node *np)
-{
- return NAND_ECC_ENGINE_TYPE_INVALID;
-}
-
static enum nand_ecc_engine_type
of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
{
@@ -4916,24 +4905,6 @@ of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
return NAND_ECC_ENGINE_TYPE_INVALID;
}
-enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
-{
- enum nand_ecc_placement placement;
- const char *pm;
- int err;
-
- err = of_property_read_string(np, "nand-ecc-placement", &pm);
- if (!err) {
- for (placement = NAND_ECC_PLACEMENT_OOB;
- placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
- if (!strcasecmp(pm, nand_ecc_placement[placement]))
- return placement;
- }
- }
-
- return NAND_ECC_PLACEMENT_UNKNOWN;
-}
-
enum nand_ecc_placement
of_get_rawnand_ecc_placement_legacy(struct device_node *np)
{
@@ -4949,31 +4920,6 @@ of_get_rawnand_ecc_placement_legacy(struct device_node *np)
return NAND_ECC_PLACEMENT_UNKNOWN;
}
-static const char * const nand_ecc_algos[] = {
- [NAND_ECC_ALGO_HAMMING] = "hamming",
- [NAND_ECC_ALGO_BCH] = "bch",
- [NAND_ECC_ALGO_RS] = "rs",
-};
-
-static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
-{
- enum nand_ecc_algo ecc_algo;
- const char *pm;
- int err;
-
- err = of_property_read_string(np, "nand-ecc-algo", &pm);
- if (!err) {
- for (ecc_algo = NAND_ECC_ALGO_HAMMING;
- ecc_algo < ARRAY_SIZE(nand_ecc_algos);
- ecc_algo++) {
- if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
- return ecc_algo;
- }
- }
-
- return NAND_ECC_ALGO_UNKNOWN;
-}
-
static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
{
const char *pm;
@@ -4990,48 +4936,10 @@ static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
return NAND_ECC_ALGO_UNKNOWN;
}
-static int of_get_nand_ecc_step_size(struct device_node *np)
-{
- int ret;
- u32 val;
-
- ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
- return ret ? ret : val;
-}
-
-static int of_get_nand_ecc_strength(struct device_node *np)
-{
- int ret;
- u32 val;
-
- ret = of_property_read_u32(np, "nand-ecc-strength", &val);
- return ret ? ret : val;
-}
-
-static void nand_ecc_read_user_conf(struct nand_chip *chip)
-{
- struct device_node *dn = nand_get_flash_node(chip);
- struct nand_device *nand = &chip->base;
- int strength, size;
-
- nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
- nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
- nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
-
- strength = of_get_nand_ecc_strength(dn);
- if (strength >= 0)
- nand->ecc.user_conf.strength = strength;
-
- size = of_get_nand_ecc_step_size(dn);
- if (size >= 0)
- nand->ecc.user_conf.step_size = size;
-}
-
static void rawnand_ecc_read_legacy_user_conf(struct nand_chip *chip)
{
struct device_node *dn = nand_get_flash_node(chip);
- struct nand_device *nand = &chip->base;
- struct nand_ecc_props *user_conf = &nand->ecc.user_conf;
+ struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf;
if (user_conf->engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn);
@@ -5081,10 +4989,7 @@ static int rawnand_dt_init(struct nand_chip *chip)
if (of_get_nand_on_flash_bbt(dn))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- if (of_property_read_bool(dn, "nand-ecc-maximize"))
- chip->ecc.options |= NAND_ECC_MAXIMIZE;
-
- nand_ecc_read_user_conf(chip);
+ nand_ecc_read_user_conf(nand);
rawnand_ecc_read_legacy_user_conf(chip);
/*
@@ -5214,6 +5119,7 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
static int nand_set_ecc_soft_ops(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
@@ -5289,7 +5195,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
* used.
*/
if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
- ecc->options & NAND_ECC_MAXIMIZE) {
+ nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE) {
int steps, bytes;
/* Always prefer 1k blocks over 512bytes ones */
@@ -5529,11 +5435,12 @@ nand_maximize_ecc(struct nand_chip *chip,
* @caps: ECC engine caps info structure
* @oobavail: OOB size that the ECC engine can use
*
- * Choose the ECC configuration according to following logic
+ * Choose the ECC configuration according to following logic.
*
* 1. If both ECC step size and ECC strength are already set (usually by DT)
* then check if it is supported by this controller.
- * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
+ * 2. If the user provided the nand-ecc-maximize property, then select maximum
+ * ECC strength.
* 3. Otherwise, try to match the ECC step size and ECC strength closest
* to the chip's requirement. If available OOB size can't fit the chip
* requirement then fallback to the maximum ECC step size and ECC strength.
@@ -5544,6 +5451,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
const struct nand_ecc_caps *caps, int oobavail)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
return -EINVAL;
@@ -5551,7 +5459,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
if (chip->ecc.size && chip->ecc.strength)
return nand_check_ecc_caps(chip, caps, oobavail);
- if (chip->ecc.options & NAND_ECC_MAXIMIZE)
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE)
return nand_maximize_ecc(chip, caps, oobavail);
if (!nand_match_ecc_req(chip, caps, oobavail))
@@ -5561,43 +5469,6 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
}
EXPORT_SYMBOL_GPL(nand_ecc_choose_conf);
-/*
- * Check if the chip configuration meet the datasheet requirements.
-
- * If our configuration corrects A bits per B bytes and the minimum
- * required correction level is X bits per Y bytes, then we must ensure
- * both of the following are true:
- *
- * (1) A / B >= X / Y
- * (2) A >= X
- *
- * Requirement (1) ensures we can correct for the required bitflip density.
- * Requirement (2) ensures we can correct even when all bitflips are clumped
- * in the same sector.
- */
-static bool nand_ecc_strength_good(struct nand_chip *chip)
-{
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct nand_ecc_ctrl *ecc = &chip->ecc;
- const struct nand_ecc_props *requirements =
- nanddev_get_ecc_requirements(&chip->base);
- int corr, ds_corr;
-
- if (ecc->size == 0 || requirements->step_size == 0)
- /* Not enough information */
- return true;
-
- /*
- * We get the number of corrected bits per page to compare
- * the correction density.
- */
- corr = (mtd->writesize * ecc->strength) / ecc->size;
- ds_corr = (mtd->writesize * requirements->strength) /
- requirements->step_size;
-
- return corr >= ds_corr && ecc->strength >= requirements->strength;
-}
-
static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)
{
struct nand_chip *chip = container_of(nand, struct nand_chip,
@@ -5653,6 +5524,7 @@ static const struct nand_ops rawnand_ops = {
static int nand_scan_tail(struct nand_chip *chip)
{
struct mtd_info *mtd = nand_to_mtd(chip);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
int ret, i;
@@ -5880,7 +5752,7 @@ static int nand_scan_tail(struct nand_chip *chip)
mtd->oobavail = ret;
/* ECC sanity check: warn if it's too weak */
- if (!nand_ecc_strength_good(chip))
+ if (!nand_ecc_correction_is_enough(nanddev))
pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n",
mtd->name,
nanddev_get_ecc_conf(&chip->base)->strength,
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 490ba485e939..f863fabb8610 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1609,12 +1609,13 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 };
struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
struct mtd_info *mtd = nand_to_mtd(nand);
+ struct nand_device *nanddev = mtd_to_nanddev(mtd);
struct sunxi_nand_hw_ecc *data;
int nsectors;
int ret;
int i;
- if (ecc->options & NAND_ECC_MAXIMIZE) {
+ if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE) {
int bytes;
ecc->size = 1024;
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index fecdb7e8f9e8..1267e7529ca2 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -840,9 +840,10 @@ static int tegra_nand_get_strength(struct nand_chip *chip, const int *strength,
int strength_len, int bits_per_step,
int oobsize)
{
+ struct nand_device *base = mtd_to_nanddev(nand_to_mtd(chip));
const struct nand_ecc_props *requirements =
- nanddev_get_ecc_requirements(&chip->base);
- bool maximize = chip->ecc.options & NAND_ECC_MAXIMIZE;
+ nanddev_get_ecc_requirements(base);
+ bool maximize = base->ecc.user_conf.flags & NAND_ECC_MAXIMIZE;
int i;
/*
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 817969a8a230..343bb9bcd56c 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -182,6 +182,7 @@ enum nand_ecc_algo {
* @algo: ECC algorithm (if relevant)
* @strength: ECC strength
* @step_size: Number of bytes per step
+ * @flags: Misc properties
*/
struct nand_ecc_props {
enum nand_ecc_engine_type engine_type;
@@ -189,10 +190,14 @@ struct nand_ecc_props {
enum nand_ecc_algo algo;
unsigned int strength;
unsigned int step_size;
+ unsigned int flags;
};
#define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) }
+/* NAND ECC misc flags */
+#define NAND_ECC_MAXIMIZE BIT(0)
+
/**
* struct nand_bbt - bad block table object
* @cache: in memory BBT cache
@@ -264,12 +269,14 @@ struct nand_ecc_engine {
struct nand_ecc_engine_ops *ops;
};
+void nand_ecc_read_user_conf(struct nand_device *nand);
int nand_ecc_init_ctx(struct nand_device *nand);
void nand_ecc_cleanup_ctx(struct nand_device *nand);
int nand_ecc_prepare_io_req(struct nand_device *nand,
struct nand_page_io_req *req);
int nand_ecc_finish_io_req(struct nand_device *nand,
struct nand_page_io_req *req);
+bool nand_ecc_correction_is_enough(struct nand_device *nand);
/**
* struct nand_ecc - Information relative to the ECC
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 66f69a1d27a5..9d69fa6608ae 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -98,7 +98,6 @@ struct nand_chip;
* pages and you want to rely on the default implementation.
*/
#define NAND_ECC_GENERIC_ERASED_CHECK BIT(0)
-#define NAND_ECC_MAXIMIZE BIT(1)
/*
* Option constants for bizarre disfunctionality and real
--
2.20.1
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-02 14:31 ` [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits " Miquel Raynal
@ 2020-06-02 16:18 ` Boris Brezillon
2020-06-02 16:21 ` Boris Brezillon
2020-06-02 16:23 ` Boris Brezillon
2 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:18 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:24 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Many helpers are generic to all NAND chips, they should not be
> restricted to be only used by raw NAND controller drivers. They might
> later be used by generic ECC engines and SPI-NAND devices as well so
> move them into a more generic place.
>
> To avoid moving all the raw NAND core "history" into the generic NAND
> layer, we already moved certain bits into legacy helpers in the raw
> NAND core to ensure backward compatibility.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/ecc.c | 138 +++++++++++++++++
> drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +-
> drivers/mtd/nand/raw/denali.c | 3 +
> drivers/mtd/nand/raw/nand_base.c | 150 ++-----------------
> drivers/mtd/nand/raw/sunxi_nand.c | 3 +-
> drivers/mtd/nand/raw/tegra_nand.c | 5 +-
> include/linux/mtd/nand.h | 7 +
> include/linux/mtd/rawnand.h | 1 -
> 8 files changed, 166 insertions(+), 144 deletions(-)
>
> diff --git a/drivers/mtd/nand/ecc.c b/drivers/mtd/nand/ecc.c
> index ad08a047dfc5..1ac7aaa6c6c2 100644
> --- a/drivers/mtd/nand/ecc.c
> +++ b/drivers/mtd/nand/ecc.c
> @@ -328,6 +328,144 @@ const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
> }
> EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
>
> +static enum nand_ecc_engine_type
> +of_get_nand_ecc_engine_type(struct device_node *np)
> +{
> + return NAND_ECC_ENGINE_TYPE_INVALID;
> +}
> +
> +static const char * const nand_ecc_placement[] = {
> + [NAND_ECC_PLACEMENT_OOB] = "oob",
> + [NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
> +};
> +
> +enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
> +{
> + enum nand_ecc_placement placement;
> + const char *pm;
> + int err;
> +
> + err = of_property_read_string(np, "nand-ecc-placement", &pm);
> + if (!err) {
> + for (placement = NAND_ECC_PLACEMENT_OOB;
> + placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
> + if (!strcasecmp(pm, nand_ecc_placement[placement]))
> + return placement;
> + }
> + }
> +
> + return NAND_ECC_PLACEMENT_UNKNOWN;
> +}
> +
> +static const char * const nand_ecc_algos[] = {
> + [NAND_ECC_ALGO_HAMMING] = "hamming",
> + [NAND_ECC_ALGO_BCH] = "bch",
> + [NAND_ECC_ALGO_RS] = "rs",
Can we use spaces instead of tabs, as done for nand_ecc_placement?
> +};
> +
> +static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
> +{
> + enum nand_ecc_algo ecc_algo;
> + const char *pm;
> + int err;
> +
> + err = of_property_read_string(np, "nand-ecc-algo", &pm);
> + if (!err) {
> + for (ecc_algo = NAND_ECC_ALGO_HAMMING;
> + ecc_algo < ARRAY_SIZE(nand_ecc_algos);
> + ecc_algo++) {
> + if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
> + return ecc_algo;
> + }
> + }
> +
> + return NAND_ECC_ALGO_UNKNOWN;
> +}
> +
> +static int of_get_nand_ecc_step_size(struct device_node *np)
> +{
> + int ret;
> + u32 val;
> +
> + ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
> + return ret ? ret : val;
> +}
> +
> +static int of_get_nand_ecc_strength(struct device_node *np)
> +{
> + int ret;
> + u32 val;
> +
> + ret = of_property_read_u32(np, "nand-ecc-strength", &val);
> + return ret ? ret : val;
> +}
> +
> +static inline bool of_get_nand_ecc_maximize(struct device_node *np)
> +{
> + return of_property_read_bool(np, "nand-ecc-maximize");
> +}
> +
> +void nand_ecc_read_user_conf(struct nand_device *nand)
> +{
> + struct device_node *dn = nanddev_get_of_node(nand);
> + int strength, size;
> +
> + nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
> + nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
> + nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
> +
> + strength = of_get_nand_ecc_strength(dn);
> + if (strength >= 0)
> + nand->ecc.user_conf.strength = strength;
> +
> + size = of_get_nand_ecc_step_size(dn);
> + if (size >= 0)
> + nand->ecc.user_conf.step_size = size;
> +
> + if (of_get_nand_ecc_maximize(dn))
> + nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE;
> +}
> +EXPORT_SYMBOL(nand_ecc_read_user_conf);
> +
> +/**
> + * nand_ecc_correction_is_enough - Check if the chip configuration meets the
> + * datasheet requirements.
> + *
> + * @nand: Device to check
> + *
> + * If our configuration corrects A bits per B bytes and the minimum
> + * required correction level is X bits per Y bytes, then we must ensure
> + * both of the following are true:
> + *
> + * (1) A / B >= X / Y
> + * (2) A >= X
> + *
> + * Requirement (1) ensures we can correct for the required bitflip density.
> + * Requirement (2) ensures we can correct even when all bitflips are clumped
> + * in the same sector.
> + */
> +bool nand_ecc_correction_is_enough(struct nand_device *nand)
nand_ecc_is_strong_enough() ?
> +{
> + const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand);
> + const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand);
> + struct mtd_info *mtd = nanddev_to_mtd(nand);
> + int corr, ds_corr;
> +
> + if (conf->step_size == 0 || reqs->step_size == 0)
> + /* Not enough information */
> + return true;
> +
> + /*
> + * We get the number of corrected bits per page to compare
> + * the correction density.
> + */
> + corr = (mtd->writesize * conf->strength) / conf->step_size;
> + ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size;
> +
> + return corr >= ds_corr && conf->strength >= reqs->strength;
> +}
> +EXPORT_SYMBOL(nand_ecc_correction_is_enough);
> +
> MODULE_LICENSE("GPL");
> MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>");
> MODULE_DESCRIPTION("Generic ECC engine");
> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
> index 08df7f23b859..39d8fe15b8ab 100644
> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> @@ -1046,6 +1046,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
> const struct nand_ecc_props *requirements =
> nanddev_get_ecc_requirements(&chip->base);
> struct mtd_info *mtd = nand_to_mtd(chip);
> + struct nand_device *nanddev = mtd_to_nanddev(mtd);
> struct atmel_nand *nand = to_atmel_nand(chip);
> struct atmel_nand_controller *nc;
> struct atmel_pmecc_user_req req;
> @@ -1070,7 +1071,7 @@ static int atmel_nand_pmecc_init(struct nand_chip *chip)
> chip->ecc.size = val;
> }
>
> - if (chip->ecc.options & NAND_ECC_MAXIMIZE)
> + if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE)
> req.ecc.strength = ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH;
I'd prefer to have that done in 2 steps:
1/ move/duplicate definitions found in rawnand.h
2/ patch rawnand code to finally use the nanddev->ecc.user_conf object
for the ECC config.
> else if (chip->ecc.strength)
> req.ecc.strength = chip->ecc.strength;
> diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
> index a6a6464974ec..51bc014ebc0a 100644
> --- a/drivers/mtd/nand/raw/denali.c
> +++ b/drivers/mtd/nand/raw/denali.c
> @@ -1181,6 +1181,7 @@ int denali_chip_init(struct denali_controller *denali,
> {
> struct nand_chip *chip = &dchip->chip;
> struct mtd_info *mtd = nand_to_mtd(chip);
> + struct nand_device *nanddev = mtd_to_nanddev(mtd);
> struct denali_chip *dchip2;
> int i, j, ret;
>
> @@ -1248,6 +1249,8 @@ int denali_chip_init(struct denali_controller *denali,
>
> mtd_set_ooblayout(mtd, &denali_ooblayout_ops);
>
> + nanddev->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE;
> +
Is that correct? I don't find the
chip->ecc.options |= NAND_ECC_MAXIMIZE;
removal that this line is replacing.
> ret = nand_scan(chip, dchip->nsels);
> if (ret)
> return ret;
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index afc3506468ba..036e88cb52a1 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -4854,17 +4854,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
> return ret;
> }
>
> -static const char * const nand_ecc_placement[] = {
> - [NAND_ECC_PLACEMENT_OOB] = "oob",
> - [NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
> -};
> -
> -static enum nand_ecc_engine_type
> -of_get_nand_ecc_engine_type(struct device_node *np)
> -{
> - return NAND_ECC_ENGINE_TYPE_INVALID;
> -}
> -
> static enum nand_ecc_engine_type
> of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
> {
> @@ -4916,24 +4905,6 @@ of_get_rawnand_ecc_engine_type_legacy(struct device_node *np)
> return NAND_ECC_ENGINE_TYPE_INVALID;
> }
>
> -enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
> -{
> - enum nand_ecc_placement placement;
> - const char *pm;
> - int err;
> -
> - err = of_property_read_string(np, "nand-ecc-placement", &pm);
> - if (!err) {
> - for (placement = NAND_ECC_PLACEMENT_OOB;
> - placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
> - if (!strcasecmp(pm, nand_ecc_placement[placement]))
> - return placement;
> - }
> - }
> -
> - return NAND_ECC_PLACEMENT_UNKNOWN;
> -}
> -
> enum nand_ecc_placement
> of_get_rawnand_ecc_placement_legacy(struct device_node *np)
> {
> @@ -4949,31 +4920,6 @@ of_get_rawnand_ecc_placement_legacy(struct device_node *np)
> return NAND_ECC_PLACEMENT_UNKNOWN;
> }
>
> -static const char * const nand_ecc_algos[] = {
> - [NAND_ECC_ALGO_HAMMING] = "hamming",
> - [NAND_ECC_ALGO_BCH] = "bch",
> - [NAND_ECC_ALGO_RS] = "rs",
> -};
> -
> -static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
> -{
> - enum nand_ecc_algo ecc_algo;
> - const char *pm;
> - int err;
> -
> - err = of_property_read_string(np, "nand-ecc-algo", &pm);
> - if (!err) {
> - for (ecc_algo = NAND_ECC_ALGO_HAMMING;
> - ecc_algo < ARRAY_SIZE(nand_ecc_algos);
> - ecc_algo++) {
> - if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
> - return ecc_algo;
> - }
> - }
> -
> - return NAND_ECC_ALGO_UNKNOWN;
> -}
> -
> static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
> {
> const char *pm;
> @@ -4990,48 +4936,10 @@ static enum nand_ecc_algo of_get_rawnand_ecc_algo_legacy(struct device_node *np)
> return NAND_ECC_ALGO_UNKNOWN;
> }
>
> -static int of_get_nand_ecc_step_size(struct device_node *np)
> -{
> - int ret;
> - u32 val;
> -
> - ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
> - return ret ? ret : val;
> -}
> -
> -static int of_get_nand_ecc_strength(struct device_node *np)
> -{
> - int ret;
> - u32 val;
> -
> - ret = of_property_read_u32(np, "nand-ecc-strength", &val);
> - return ret ? ret : val;
> -}
> -
> -static void nand_ecc_read_user_conf(struct nand_chip *chip)
> -{
> - struct device_node *dn = nand_get_flash_node(chip);
> - struct nand_device *nand = &chip->base;
> - int strength, size;
> -
> - nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
> - nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
> - nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
> -
> - strength = of_get_nand_ecc_strength(dn);
> - if (strength >= 0)
> - nand->ecc.user_conf.strength = strength;
> -
> - size = of_get_nand_ecc_step_size(dn);
> - if (size >= 0)
> - nand->ecc.user_conf.step_size = size;
> -}
> -
> static void rawnand_ecc_read_legacy_user_conf(struct nand_chip *chip)
> {
> struct device_node *dn = nand_get_flash_node(chip);
> - struct nand_device *nand = &chip->base;
> - struct nand_ecc_props *user_conf = &nand->ecc.user_conf;
> + struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf;
>
> if (user_conf->engine_type != NAND_ECC_ENGINE_TYPE_INVALID)
> user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn);
> @@ -5081,10 +4989,7 @@ static int rawnand_dt_init(struct nand_chip *chip)
> if (of_get_nand_on_flash_bbt(dn))
> chip->bbt_options |= NAND_BBT_USE_FLASH;
>
> - if (of_property_read_bool(dn, "nand-ecc-maximize"))
> - chip->ecc.options |= NAND_ECC_MAXIMIZE;
> -
> - nand_ecc_read_user_conf(chip);
> + nand_ecc_read_user_conf(nand);
> rawnand_ecc_read_legacy_user_conf(chip);
>
> /*
> @@ -5214,6 +5119,7 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
> static int nand_set_ecc_soft_ops(struct nand_chip *chip)
> {
> struct mtd_info *mtd = nand_to_mtd(chip);
> + struct nand_device *nanddev = mtd_to_nanddev(mtd);
> struct nand_ecc_ctrl *ecc = &chip->ecc;
>
> if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))
> @@ -5289,7 +5195,7 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)
> * used.
> */
> if (mtd->ooblayout == nand_get_large_page_ooblayout() &&
> - ecc->options & NAND_ECC_MAXIMIZE) {
> + nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE) {
> int steps, bytes;
>
> /* Always prefer 1k blocks over 512bytes ones */
> @@ -5529,11 +5435,12 @@ nand_maximize_ecc(struct nand_chip *chip,
> * @caps: ECC engine caps info structure
> * @oobavail: OOB size that the ECC engine can use
> *
> - * Choose the ECC configuration according to following logic
> + * Choose the ECC configuration according to following logic.
> *
> * 1. If both ECC step size and ECC strength are already set (usually by DT)
> * then check if it is supported by this controller.
> - * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
> + * 2. If the user provided the nand-ecc-maximize property, then select maximum
> + * ECC strength.
> * 3. Otherwise, try to match the ECC step size and ECC strength closest
> * to the chip's requirement. If available OOB size can't fit the chip
> * requirement then fallback to the maximum ECC step size and ECC strength.
> @@ -5544,6 +5451,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
> const struct nand_ecc_caps *caps, int oobavail)
> {
> struct mtd_info *mtd = nand_to_mtd(chip);
> + struct nand_device *nanddev = mtd_to_nanddev(mtd);
>
> if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
> return -EINVAL;
> @@ -5551,7 +5459,7 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
> if (chip->ecc.size && chip->ecc.strength)
> return nand_check_ecc_caps(chip, caps, oobavail);
>
> - if (chip->ecc.options & NAND_ECC_MAXIMIZE)
> + if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE)
> return nand_maximize_ecc(chip, caps, oobavail);
>
> if (!nand_match_ecc_req(chip, caps, oobavail))
> @@ -5561,43 +5469,6 @@ int nand_ecc_choose_conf(struct nand_chip *chip,
> }
> EXPORT_SYMBOL_GPL(nand_ecc_choose_conf);
>
> -/*
> - * Check if the chip configuration meet the datasheet requirements.
> -
> - * If our configuration corrects A bits per B bytes and the minimum
> - * required correction level is X bits per Y bytes, then we must ensure
> - * both of the following are true:
> - *
> - * (1) A / B >= X / Y
> - * (2) A >= X
> - *
> - * Requirement (1) ensures we can correct for the required bitflip density.
> - * Requirement (2) ensures we can correct even when all bitflips are clumped
> - * in the same sector.
> - */
> -static bool nand_ecc_strength_good(struct nand_chip *chip)
> -{
> - struct mtd_info *mtd = nand_to_mtd(chip);
> - struct nand_ecc_ctrl *ecc = &chip->ecc;
> - const struct nand_ecc_props *requirements =
> - nanddev_get_ecc_requirements(&chip->base);
> - int corr, ds_corr;
> -
> - if (ecc->size == 0 || requirements->step_size == 0)
> - /* Not enough information */
> - return true;
> -
> - /*
> - * We get the number of corrected bits per page to compare
> - * the correction density.
> - */
> - corr = (mtd->writesize * ecc->strength) / ecc->size;
> - ds_corr = (mtd->writesize * requirements->strength) /
> - requirements->step_size;
> -
> - return corr >= ds_corr && ecc->strength >= requirements->strength;
> -}
> -
> static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)
> {
> struct nand_chip *chip = container_of(nand, struct nand_chip,
> @@ -5653,6 +5524,7 @@ static const struct nand_ops rawnand_ops = {
> static int nand_scan_tail(struct nand_chip *chip)
> {
> struct mtd_info *mtd = nand_to_mtd(chip);
> + struct nand_device *nanddev = mtd_to_nanddev(mtd);
> struct nand_ecc_ctrl *ecc = &chip->ecc;
> int ret, i;
>
> @@ -5880,7 +5752,7 @@ static int nand_scan_tail(struct nand_chip *chip)
> mtd->oobavail = ret;
>
> /* ECC sanity check: warn if it's too weak */
> - if (!nand_ecc_strength_good(chip))
> + if (!nand_ecc_correction_is_enough(nanddev))
Can we do this rename separately?
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-02 14:31 ` [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits " Miquel Raynal
2020-06-02 16:18 ` Boris Brezillon
@ 2020-06-02 16:21 ` Boris Brezillon
2020-06-03 12:58 ` Miquel Raynal
2020-06-02 16:23 ` Boris Brezillon
2 siblings, 1 reply; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:21 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:24 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> +void nand_ecc_read_user_conf(struct nand_device *nand)
This function is not introduced in this patch, but I'm commenting here.
Looks like it only operates on an OF node, so how about naming it
of_get_nand_ecc_config().
> +{
> + struct device_node *dn = nanddev_get_of_node(nand);
> + int strength, size;
> +
> + nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
> + nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
> + nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
> +
> + strength = of_get_nand_ecc_strength(dn);
> + if (strength >= 0)
> + nand->ecc.user_conf.strength = strength;
> +
> + size = of_get_nand_ecc_step_size(dn);
> + if (size >= 0)
> + nand->ecc.user_conf.step_size = size;
> +
> + if (of_get_nand_ecc_maximize(dn))
> + nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE;
> +}
> +EXPORT_SYMBOL(nand_ecc_read_user_conf);
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-02 16:21 ` Boris Brezillon
@ 2020-06-03 12:58 ` Miquel Raynal
2020-06-03 13:05 ` Boris Brezillon
0 siblings, 1 reply; 22+ messages in thread
From: Miquel Raynal @ 2020-06-03 12:58 UTC (permalink / raw)
To: Boris Brezillon
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
Boris Brezillon <boris.brezillon@collabora.com> wrote on Tue, 2 Jun
2020 18:21:57 +0200:
> On Tue, 2 Jun 2020 16:31:24 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> > +void nand_ecc_read_user_conf(struct nand_device *nand)
>
> This function is not introduced in this patch, but I'm commenting here.
> Looks like it only operates on an OF node, so how about naming it
> of_get_nand_ecc_config().
of_get_nand_ecc_user_config()? I'd like to mention "user" because
"config" is way too vague given the number of possible configuration
sources.
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-03 12:58 ` Miquel Raynal
@ 2020-06-03 13:05 ` Boris Brezillon
0 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-03 13:05 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Wed, 3 Jun 2020 14:58:33 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Boris Brezillon <boris.brezillon@collabora.com> wrote on Tue, 2 Jun
> 2020 18:21:57 +0200:
>
> > On Tue, 2 Jun 2020 16:31:24 +0200
> > Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> >
> > > +void nand_ecc_read_user_conf(struct nand_device *nand)
> >
> > This function is not introduced in this patch, but I'm commenting here.
> > Looks like it only operates on an OF node, so how about naming it
> > of_get_nand_ecc_config().
>
> of_get_nand_ecc_user_config()? I'd like to mention "user" because
> "config" is way too vague given the number of possible configuration
> sources.
Works for me.
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits to the ECC framework
2020-06-02 14:31 ` [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits " Miquel Raynal
2020-06-02 16:18 ` Boris Brezillon
2020-06-02 16:21 ` Boris Brezillon
@ 2020-06-02 16:23 ` Boris Brezillon
2 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:23 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:24 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Many helpers are generic to all NAND chips, they should not be
> restricted to be only used by raw NAND controller drivers. They might
> later be used by generic ECC engines and SPI-NAND devices as well so
> move them into a more generic place.
>
> To avoid moving all the raw NAND core "history" into the generic NAND
> layer, we already moved certain bits into legacy helpers in the raw
> NAND core to ensure backward compatibility.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/ecc.c | 138 +++++++++++++++++
> drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +-
> drivers/mtd/nand/raw/denali.c | 3 +
> drivers/mtd/nand/raw/nand_base.c | 150 ++-----------------
> drivers/mtd/nand/raw/sunxi_nand.c | 3 +-
> drivers/mtd/nand/raw/tegra_nand.c | 5 +-
> include/linux/mtd/nand.h | 7 +
> include/linux/mtd/rawnand.h | 1 -
> 8 files changed, 166 insertions(+), 144 deletions(-)
>
> diff --git a/drivers/mtd/nand/ecc.c b/drivers/mtd/nand/ecc.c
> index ad08a047dfc5..1ac7aaa6c6c2 100644
> --- a/drivers/mtd/nand/ecc.c
> +++ b/drivers/mtd/nand/ecc.c
> @@ -328,6 +328,144 @@ const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
> }
> EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
>
> +static enum nand_ecc_engine_type
> +of_get_nand_ecc_engine_type(struct device_node *np)
> +{
> + return NAND_ECC_ENGINE_TYPE_INVALID;
> +}
> +
> +static const char * const nand_ecc_placement[] = {
> + [NAND_ECC_PLACEMENT_OOB] = "oob",
> + [NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
> +};
> +
> +enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
> +{
> + enum nand_ecc_placement placement;
> + const char *pm;
> + int err;
> +
> + err = of_property_read_string(np, "nand-ecc-placement", &pm);
> + if (!err) {
> + for (placement = NAND_ECC_PLACEMENT_OOB;
> + placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
> + if (!strcasecmp(pm, nand_ecc_placement[placement]))
> + return placement;
> + }
> + }
> +
> + return NAND_ECC_PLACEMENT_UNKNOWN;
> +}
> +
> +static const char * const nand_ecc_algos[] = {
> + [NAND_ECC_ALGO_HAMMING] = "hamming",
> + [NAND_ECC_ALGO_BCH] = "bch",
> + [NAND_ECC_ALGO_RS] = "rs",
> +};
> +
> +static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
> +{
> + enum nand_ecc_algo ecc_algo;
> + const char *pm;
> + int err;
> +
> + err = of_property_read_string(np, "nand-ecc-algo", &pm);
> + if (!err) {
> + for (ecc_algo = NAND_ECC_ALGO_HAMMING;
> + ecc_algo < ARRAY_SIZE(nand_ecc_algos);
> + ecc_algo++) {
> + if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
> + return ecc_algo;
> + }
> + }
> +
> + return NAND_ECC_ALGO_UNKNOWN;
> +}
> +
> +static int of_get_nand_ecc_step_size(struct device_node *np)
> +{
> + int ret;
> + u32 val;
> +
> + ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
> + return ret ? ret : val;
> +}
> +
> +static int of_get_nand_ecc_strength(struct device_node *np)
> +{
> + int ret;
> + u32 val;
> +
> + ret = of_property_read_u32(np, "nand-ecc-strength", &val);
> + return ret ? ret : val;
> +}
> +
> +static inline bool of_get_nand_ecc_maximize(struct device_node *np)
The inline is useless here, and I'm even wondering if we couldn't
inline the code of_property_read_bool() call directly.
> +{
> + return of_property_read_bool(np, "nand-ecc-maximize");
> +}
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v9 0/9] Preparation to the generic ECC engine abstraction
2020-06-02 14:31 [PATCH v9 0/9] Preparation to the generic ECC engine abstraction Miquel Raynal
` (8 preceding siblings ...)
2020-06-02 14:31 ` [PATCH v9 9/9] mtd: rawnand: Move the user input parsing bits " Miquel Raynal
@ 2020-06-02 16:33 ` Boris Brezillon
9 siblings, 0 replies; 22+ messages in thread
From: Boris Brezillon @ 2020-06-02 16:33 UTC (permalink / raw)
To: Miquel Raynal
Cc: Vignesh Raghavendra, Tudor Ambarus, Julien Su, Richard Weinberger,
linux-mtd, Thomas Petazzoni, Mason Yang, linux-arm-kernel
On Tue, 2 Jun 2020 16:31:15 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> This is a respin of the end of my previous series, just the patches which needed to be fixed.
>
> Changes in v9:
> * This time sending the additional patchs, not just the old ones with
> corrections. v8 should be ignored, sorry for the noise.
>
> Changes in v8:
> * Split "Convert generic NAND bits to ECC framework" into several peaces:
> > added two helpers
> > converted SPI-NAND then raw-NAND.
> * Fixed a comment.
> * Used the _ooblayout suffix instead of _layout.
>
>
> Miquel Raynal (9):
> mtd: nand: Create a helper to extract the ECC configuration
> mtd: spinand: Use nanddev_get_ecc_conf() when relevant
> mtd: nand: Create a helper to extract the ECC requirements
> mtd: rawnand: Use nanddev_get_ecc_requirements() when relevant
> mtd: nand: Convert generic NAND bits to use the ECC framework
> mtd: rawnand: Hide the generic OOB layout objects behind helpers
> mtd: rawnand: Write a compatibility layer
> mtd: rawnand: Move generic OOB layouts to the ECC framework
> mtd: rawnand: Move the user input parsing bits to the ECC framework
Sorry, but I keep thinking you should re-order things so we don't have
code blocks introduced and then moved around in the same patchset.
What's the point of introducing new props/helpers in rawnand if the
ultimate goal is to move them to nand.h, especially since none of the
existing rawnand drivers (or the rawnand core) need those new DT props
right now. You should really consider doing that in 3 distinct steps:
1/ Introduce ECC related fields/defs/... at the generic NAND level
2/ Patch rawnand to use those fields/new defs and deprecate the old ones
3/ Move rawnand defs/code that can be made generic and be useful to
!rawnand users
>
> drivers/mtd/nand/ecc.c | 314 ++++++++++++++
> drivers/mtd/nand/raw/Kconfig | 1 +
> drivers/mtd/nand/raw/arasan-nand-controller.c | 2 +-
> drivers/mtd/nand/raw/atmel/nand-controller.c | 15 +-
> drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 +-
> drivers/mtd/nand/raw/davinci_nand.c | 3 +-
> drivers/mtd/nand/raw/denali.c | 3 +
> drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 13 +-
> .../mtd/nand/raw/ingenic/ingenic_nand_drv.c | 6 +-
> drivers/mtd/nand/raw/marvell_nand.c | 8 +-
> drivers/mtd/nand/raw/mtk_nand.c | 6 +-
> drivers/mtd/nand/raw/nand_base.c | 395 ++++--------------
> drivers/mtd/nand/raw/nand_esmt.c | 14 +-
> drivers/mtd/nand/raw/nand_hynix.c | 43 +-
> drivers/mtd/nand/raw/nand_jedec.c | 7 +-
> drivers/mtd/nand/raw/nand_micron.c | 17 +-
> drivers/mtd/nand/raw/nand_onfi.c | 14 +-
> drivers/mtd/nand/raw/nand_samsung.c | 21 +-
> drivers/mtd/nand/raw/nand_toshiba.c | 15 +-
> drivers/mtd/nand/raw/sunxi_nand.c | 9 +-
> drivers/mtd/nand/raw/tegra_nand.c | 15 +-
> drivers/mtd/nand/raw/vf610_nfc.c | 2 +-
> drivers/mtd/nand/spi/core.c | 10 +-
> drivers/mtd/nand/spi/macronix.c | 7 +-
> drivers/mtd/nand/spi/toshiba.c | 6 +-
> include/linux/mtd/nand.h | 40 +-
> include/linux/mtd/rawnand.h | 17 +-
> 27 files changed, 587 insertions(+), 424 deletions(-)
>
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