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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Mike Leach <mike.leach@linaro.org>
Cc: coresight@lists.linaro.org, acme@kernel.org,
	linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com
Subject: Re: [PATCH v4 4/5] coresight: etm: perf: Add default sink selection to etm perf
Date: Thu, 4 Jun 2020 15:18:55 -0600	[thread overview]
Message-ID: <20200604211855.GD18961@xps15> (raw)
In-Reply-To: <20200526104642.9526-5-mike.leach@linaro.org>

On Tue, May 26, 2020 at 11:46:41AM +0100, Mike Leach wrote:
> Add default sink selection to the perf trace handling in the etm driver.
> Uses the select default sink infrastructure to select a sink for the perf
> session, if no other sink is specified.
> 
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
>  .../hwtracing/coresight/coresight-etm-perf.c    | 17 ++++++++++++++---
>  1 file changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index 84f1dcb69827..1a3169e69bb1 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -226,9 +226,6 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
>  		sink = coresight_get_enabled_sink(true);
>  	}
>  
> -	if (!sink)
> -		goto err;
> -
>  	mask = &event_data->mask;
>  
>  	/*
> @@ -253,6 +250,16 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
>  			continue;
>  		}
>  
> +		/*
> +		 * No sink provided - look for a default sink for one of the
> +		 * devices. At present we only support topology where all CPUs
> +		 * use the same sink [N:1], so only need to find one sink. The
> +		 * coresight_build_path later will remove any CPU that does not
> +		 * attach to the sink, or if we have not found a sink.
> +		 */
> +		if (!sink)
> +			sink = coresight_find_default_sink(csdev);
> +
>  		/*
>  		 * Building a path doesn't enable it, it simply builds a
>  		 * list of devices from source to sink that can be
> @@ -267,6 +274,10 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
>  		*etm_event_cpu_path_ptr(event_data, cpu) = path;
>  	}
>  
> +	/* no sink found for any CPU - cannot trace */
> +	if (!sink)
> +		goto err;
> +

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

>  	/* If we don't have any CPUs ready for tracing, abort */
>  	cpu = cpumask_first(mask);
>  	if (cpu >= nr_cpu_ids)
> -- 
> 2.17.1
> 

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  parent reply	other threads:[~2020-06-04 21:19 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 10:46 [PATCH v4 0/5] Update CoreSight infrastructure to select a default sink Mike Leach
2020-05-26 10:46 ` [PATCH v4 1/5] coresight: Fix comment in main header file Mike Leach
2020-05-26 14:49   ` Suzuki K Poulose
2020-06-04 21:14   ` Mathieu Poirier
2020-05-26 10:46 ` [PATCH v4 2/5] coresight: Add default sink selection to CoreSight base Mike Leach
2020-06-02 10:25   ` Suzuki K Poulose
2020-06-02 14:20     ` Mike Leach
2020-06-04 21:17   ` Mathieu Poirier
2020-05-26 10:46 ` [PATCH v4 3/5] coresight: tmc: Update sink types for default selection Mike Leach
2020-06-02 10:31   ` Suzuki K Poulose
2020-06-04 21:18   ` Mathieu Poirier
2020-05-26 10:46 ` [PATCH v4 4/5] coresight: etm: perf: Add default sink selection to etm perf Mike Leach
2020-06-02 11:45   ` Suzuki K Poulose
2020-06-02 13:12     ` Mike Leach
2020-06-02 13:29       ` Suzuki K Poulose
2020-06-02 16:59         ` Mathieu Poirier
2020-06-04 21:07           ` Mike Leach
2020-06-04 21:18   ` Mathieu Poirier [this message]
2020-05-26 10:46 ` [PATCH v4 5/5] coresight: sysfs: Allow select default sink on source enable Mike Leach
2020-06-02 11:51   ` Suzuki K Poulose
2020-06-04 21:12     ` Mike Leach

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