Re: [PATCH 0/2] Introduce PCI_FIXUP_IOMMU

zhangfei.gao
2021-01-12T07:08:57Z

Hi, Bjorn

On 2020/12/18 上午4:38, Bjorn Helgaas wrote:
>
>>> The principles are:
>>>
>>> - I don't want to have to update a quirk for every new Device ID
>>> that needs this.
>> Hi Bjorn and Zhangfei,
>>
>> We plan to use ATS/PRI to support SVA in future PCI devices. However, for
>> current devices, we need to add limited number of quirk to let them
>> work. The device IDs of current quirk needed devices are ZIP engine(0xa250, 0xa251),
>> SEC engine(0xa255, 0xa256), HPRE engine(0xa258, 0xa259), revision id are
>> 0x21 and 0x30.
>>
>> Let's continue to upstream these quirks!
> Please post the patches you propose. I don't think the previous ones
> are in my queue. Please include the lore URL for the previous
> posting(s) in the cover letter so we can connect the discussion.
>
Have sent the updated patch
https://lore.kernel.org/linux-pci/1610434192-27995-1-git-send-email-zhangfei.gao@linaro.org/T/#u

We do not need change iort now but just use a quirk for HiSilicon
KunPeng920 and KunPeng930,
since Jean made a change not using fwspec, which make us easier.

* Use device properties for dma-can-stall, instead of a special fwspec
member.

https://lore.kernel.org/linux-iommu/20210108145217.2254447-1-jean-philippe@linaro.org/

Thanks