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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id i22sm14310258pfo.92.2020.06.15.10.17.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2020 10:17:57 -0700 (PDT) Date: Mon, 15 Jun 2020 11:17:55 -0600 From: Mathieu Poirier To: Sai Prakash Ranjan Subject: Re: [PATCH 1/4] arm64: dts: qcom: sc7180: Add support to skip powering up of ETM Message-ID: <20200615171755.GA225607@xps15> References: <8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200615_101759_647545_F54D124C X-CRM114-Status: GOOD ( 14.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jonathan Marek , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Stephen Boyd , Andy Gross , Bjorn Andersson , linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 09, 2020 at 07:00:28PM +0530, Sai Prakash Ranjan wrote: > Add "qcom,skip-power-up" property to skip powering up ETM > on SC7180 SoC to workaround a hardware errata where CPU > watchdog counter is stopped when ETM power up bit is set > (i.e., when TRCPDCR.PU = 1). > > Signed-off-by: Sai Prakash Ranjan > --- > > Depends on ETM driver change here: > - https://git.linaro.org/kernel/coresight.git/commit/?h=next-v5.8-rc1&id=159e248e75b1b548276b6571d7740a35cab1f5be > > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 7c2b79dda3d7..f684a0b87848 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -1810,6 +1810,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1829,6 +1830,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1848,6 +1850,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1867,6 +1870,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1886,6 +1890,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1905,6 +1910,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1924,6 +1930,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; > > out-ports { > port { > @@ -1943,6 +1950,7 @@ > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > arm,coresight-loses-context-with-cpu; > + qcom,skip-power-up; Reviewed-by: Mathieu Poirier > > out-ports { > port { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel