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Mon, 15 Jun 2020 21:42:04 -0700 (PDT) Received: from localhost ([2601:647:5b00:1161:a4cc:eef9:fbc0:2781]) by smtp.gmail.com with ESMTPSA id e25sm9137916ios.0.2020.06.15.21.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2020 21:42:03 -0700 (PDT) Date: Mon, 15 Jun 2020 21:42:02 -0700 From: Moritz Fischer To: Luca Ceresoli Subject: Re: [PATCH 1/5] dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too Message-ID: <20200616044202.GA46300@epycbox.lan> References: <20200611211144.9421-1-luca@lucaceresoli.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200611211144.9421-1-luca@lucaceresoli.net> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200615_214206_451031_59B60E70 X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, Michal Simek , linux-kernel@vger.kernel.org, Rob Herring , Moritz Fischer , Anatolij Gustschin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jun 11, 2020 at 11:11:40PM +0200, Luca Ceresoli wrote: > The Xilinx 7-series uses the same protocol, mention that. > > Signed-off-by: Luca Ceresoli Acked-by: Moritz Fischer > --- > .../devicetree/bindings/fpga/xilinx-slave-serial.txt | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > index cfa4ed42b62f..9f103f3872e8 100644 > --- a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > @@ -1,11 +1,14 @@ > Xilinx Slave Serial SPI FPGA Manager > > -Xilinx Spartan-6 FPGAs support a method of loading the bitstream over > -what is referred to as "slave serial" interface. > +Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the > +bitstream over what is referred to as "slave serial" interface. > The slave serial link is not technically SPI, and might require extra > circuits in order to play nicely with other SPI slaves on the same bus. > > -See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf > +See: > +- https://www.xilinx.com/support/documentation/user_guides/ug380.pdf > +- https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf > +- https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf > > Required properties: > - compatible: should contain "xlnx,fpga-slave-serial" > -- > 2.27.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel