From: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
To: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: perf: add support for Cortex-A76
Date: Fri, 19 Jun 2020 18:45:59 +0800 [thread overview]
Message-ID: <20200619184559.0a8716ec@xhacker.debian> (raw)
In-Reply-To: <20200619184423.5e61a838@xhacker.debian>
The Cortex-A76 uses some implementation defined perf events. Per
Cortex-A76 TRM r4p0, section C2.3 PMU Events (pages C2-386 to C2-394),
we can reuse Cortex-A57's perf events mapping currently.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
arch/arm64/kernel/perf_event.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 55e1d75af708..4fb13fbdc2df 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -1127,7 +1127,7 @@ static int armv8_a75_pmu_init(struct arm_pmu *cpu_pmu)
static int armv8_a76_pmu_init(struct arm_pmu *cpu_pmu)
{
return armv8_pmu_init(cpu_pmu, "armv8_cortex_a76",
- armv8_pmuv3_map_event, NULL, NULL);
+ armv8_a57_map_event, NULL, NULL);
}
static int armv8_a77_pmu_init(struct arm_pmu *cpu_pmu)
--
2.27.0
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next prev parent reply other threads:[~2020-06-19 10:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-19 10:44 [PATCH 0/3] arm64: perf: add support for Cortex-A55/A75/A76 Jisheng Zhang
2020-06-19 10:45 ` [PATCH 1/3] arm64: perf: add support for Cortex-A55 Jisheng Zhang
2020-06-19 10:45 ` [PATCH 2/3] arm64: perf: add support for Cortex-A75 Jisheng Zhang
2020-06-19 10:45 ` Jisheng Zhang [this message]
2020-07-03 12:33 ` [PATCH 0/3] arm64: perf: add support for Cortex-A55/A75/A76 Will Deacon
2020-07-06 8:04 ` Jisheng Zhang
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