[PATCH v2 1/2] ARM: dts: imx6q-tbs2910: Pass phy-reset-duration

[PATCH v2 1/2] ARM: dts: imx6q-tbs2910: Pass phy-reset-duration

[Fabio Estevam]

According to the AR8035 datasheet:

"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."

Pass the 'phy-reset-duration' property to meet such requirement.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- None.

 arch/arm/boot/dts/imx6q-tbs2910.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index bfff87ce2e1f..7b03b2787430 100644
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -100,6 +100,7 @@
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
 	status = "okay";
 };
 
-- 
2.17.1


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[PATCH v2 2/2] ARM: dts: imx6q-tbs2910: Add an mdio node

[Fabio Estevam]

imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.

The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Use the correct board name in teh Subject.

 arch/arm/boot/dts/imx6q-tbs2910.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index 7b03b2787430..dfba19cd7af5 100644
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -101,7 +101,18 @@
 	phy-mode = "rgmii-id";
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <10>;
+	phy-handle = <&phy>;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@4 {
+			reg = <4>;
+			qca,clk-out-frequency = <125000000>;
+		};
+	};
 };
 
 &hdmi {
-- 
2.17.1


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Re: [PATCH v2 2/2] ARM: dts: imx6q-tbs2910: Add an mdio node

[Soeren Moch]

Hi Fabio,

On 25.06.20 13:18, Fabio Estevam wrote:
> imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
>
> The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
>
> Improve the Ethernet representation by adding an mdio node with such
> information.
>
> This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
> expects the 'qca,clk-out-frequency' property to be passed via
> device tree.
>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
Due to my experience Shawn likes the properties sorted alphabetically,
with some exceptions.
I'm not sure if the "phy-handle" property is such exception.

But this works, describes the hardware correctly, and fixes ethernet
problems in U-Boot.

Reviewed-by: Soeren Moch <smoch@web.de>


Tested in U-Boot and linux-5.7:

Tested-by: Soeren Moch <smoch@web.de>

Thanks,
Soeren
> ---
> Changes since v1:
> - Use the correct board name in teh Subject.
>
>  arch/arm/boot/dts/imx6q-tbs2910.dts | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
> index 7b03b2787430..dfba19cd7af5 100644
> --- a/arch/arm/boot/dts/imx6q-tbs2910.dts
> +++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
> @@ -101,7 +101,18 @@
>  	phy-mode = "rgmii-id";
>  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
>  	phy-reset-duration = <10>;
> +	phy-handle = <&phy>;
>  	status = "okay";
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		phy: ethernet-phy@4 {
> +			reg = <4>;
> +			qca,clk-out-frequency = <125000000>;
> +		};
> +	};
>  };
>  
>  &hdmi {



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Re: [PATCH v2 2/2] ARM: dts: imx6q-tbs2910: Add an mdio node

[Shawn Guo]

On Thu, Jun 25, 2020 at 06:29:25PM +0200, Soeren Moch wrote:
> Hi Fabio,
> 
> On 25.06.20 13:18, Fabio Estevam wrote:
> > imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
> >
> > The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
> >
> > Improve the Ethernet representation by adding an mdio node with such
> > information.
> >
> > This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
> > expects the 'qca,clk-out-frequency' property to be passed via
> > device tree.
> >
> > Signed-off-by: Fabio Estevam <festevam@gmail.com>
> Due to my experience Shawn likes the properties sorted alphabetically,
> with some exceptions.

Oh, it would be good to have properties sorted somehow, but I'm not
enforcing that.  What I like to sort alphabetically is those labeling
nodes.

Shawn

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Re: [PATCH v2 1/2] ARM: dts: imx6q-tbs2910: Pass phy-reset-duration

[Soeren Moch]

Hi Fabio,

On 25.06.20 13:18, Fabio Estevam wrote:
> According to the AR8035 datasheet:
>
> "When using crystal, the clock is generated internally after power is
> stable. For a reliable power on reset, suggest to keep asserting the reset
> low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
> requirement is satisfied."
>
> Pass the 'phy-reset-duration' property to meet such requirement.
>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
"phy-reset-duration" is listed as deprecated in
Documentation/devicetree/bindings/net/fsl-fec.txt .
So maybe it is not the best option, but it should work.

Reviewed-by: Soeren Moch <smoch@web.de>

Thanks,
Soeren
> ---
> Changes since v1:
> - None.
>
>  arch/arm/boot/dts/imx6q-tbs2910.dts | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
> index bfff87ce2e1f..7b03b2787430 100644
> --- a/arch/arm/boot/dts/imx6q-tbs2910.dts
> +++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
> @@ -100,6 +100,7 @@
>  	pinctrl-0 = <&pinctrl_enet>;
>  	phy-mode = "rgmii-id";
>  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
> +	phy-reset-duration = <10>;
>  	status = "okay";
>  };
>


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Re: [PATCH v2 1/2] ARM: dts: imx6q-tbs2910: Pass phy-reset-duration

[Shawn Guo]

On Thu, Jun 25, 2020 at 06:29:22PM +0200, Soeren Moch wrote:
> Hi Fabio,
> 
> On 25.06.20 13:18, Fabio Estevam wrote:
> > According to the AR8035 datasheet:
> >
> > "When using crystal, the clock is generated internally after power is
> > stable. For a reliable power on reset, suggest to keep asserting the reset
> > low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
> > requirement is satisfied."
> >
> > Pass the 'phy-reset-duration' property to meet such requirement.
> >
> > Signed-off-by: Fabio Estevam <festevam@gmail.com>
> "phy-reset-duration" is listed as deprecated in
> Documentation/devicetree/bindings/net/fsl-fec.txt .

Good point.  There must be some new way we should do this properly.

Shawn

> So maybe it is not the best option, but it should work.
> 
> Reviewed-by: Soeren Moch <smoch@web.de>
> 
> Thanks,
> Soeren
> > ---
> > Changes since v1:
> > - None.
> >
> >  arch/arm/boot/dts/imx6q-tbs2910.dts | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
> > index bfff87ce2e1f..7b03b2787430 100644
> > --- a/arch/arm/boot/dts/imx6q-tbs2910.dts
> > +++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
> > @@ -100,6 +100,7 @@
> >  	pinctrl-0 = <&pinctrl_enet>;
> >  	phy-mode = "rgmii-id";
> >  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
> > +	phy-reset-duration = <10>;
> >  	status = "okay";
> >  };
> >
> 

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Re: [PATCH v2 1/2] ARM: dts: imx6q-tbs2910: Pass phy-reset-duration

[Fabio Estevam]

Hi Shawn,

On Sun, Jul 12, 2020 at 10:19 PM Shawn Guo <shawnguo@kernel.org> wrote:

> Good point.  There must be some new way we should do this properly.

I have sent v3 that uses the generic 'reset-assert-us' property.

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