From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 686D3C433E0 for ; Mon, 29 Jun 2020 10:33:39 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3245F20874 for ; Mon, 29 Jun 2020 10:33:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="mBDdo3fv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3245F20874 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ev2Niss9gIHHkh66zeKnfCUCJ3u94h/zbnBXYDmdEcM=; b=mBDdo3fv5oExod4LNOuID26as FAY/abrKw1b6Kh9F+kvK3WPbvovMKLVft7es0umIi7eb8RlLAHfzzcPR4DLS30+mtAKvQFTSpgSh9 lCDNo7EarSWHsZfSivadtITefP+Y5U9+OItQEieeX9/9E6KW5VCZGQTmL1wi6lT4qykiQMtSm3EaH HBwc7ZZSSnRS/K6mgoARGvQNgPkFf9dgrtzXJYz4Tg91g48R6zJiRaWuNQOe7WVloNWe3UfXuw3sQ UxW0nfPGqkXQEFv/znd8wMcKzjAvBOPmO1ABPob/0e0YRTxGhe63eQcAiiL7MwDs85K55AOpepYNg puchmxa1Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jpr5J-00086b-9S; Mon, 29 Jun 2020 10:32:21 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jpr5G-00086M-E6 for linux-arm-kernel@lists.infradead.org; Mon, 29 Jun 2020 10:32:19 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D3C231042; Mon, 29 Jun 2020 03:32:15 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.20.135]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D422C3F71E; Mon, 29 Jun 2020 03:32:14 -0700 (PDT) Date: Mon, 29 Jun 2020 11:32:08 +0100 From: Mark Rutland To: Gavin Shan Subject: Re: [PATCH 1/2] kvm/arm64: Rename HSR to ESR Message-ID: <20200629103208.GA59769@C02TD0UTHF1T.local> References: <20200629091841.88198-1-gshan@redhat.com> <20200629091841.88198-2-gshan@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200629091841.88198-2-gshan@redhat.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 29, 2020 at 07:18:40PM +1000, Gavin Shan wrote: > kvm/arm32 isn't supported since commit 541ad0150ca4 ("arm: Remove > 32bit KVM host support"). So HSR isn't meaningful since then. This > renames HSR to ESR accordingly. This shouldn't cause any functional > changes: > > * Rename kvm_vcpu_get_hsr() to kvm_vcpu_get_esr() to make the > function names self-explanatory. > * Rename variables from @hsr to @esr to make them self-explanatory. > > Signed-off-by: Gavin Shan At a high-level, I agree that we should move to the `esr` naming to match the architecture and minimize surprise. However, I think there are some ABI changes here, which *are* funcitonal changes, and those need to be avoided. [...] > diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h > index ba85bb23f060..d54345573a88 100644 > --- a/arch/arm64/include/uapi/asm/kvm.h > +++ b/arch/arm64/include/uapi/asm/kvm.h > @@ -140,7 +140,7 @@ struct kvm_guest_debug_arch { > }; > > struct kvm_debug_exit_arch { > - __u32 hsr; > + __u32 esr; > __u64 far; /* used for watchpoints */ > }; This is userspace ABI, and changing this *will* break userspace. This *is* a functional change. NAK to this specifically. At best these should be a comment here that this is naming is legacym but must stay for ABI reasons. [...] > diff --git a/arch/arm64/kvm/trace_arm.h b/arch/arm64/kvm/trace_arm.h > index 4c71270cc097..ee4f691b16ff 100644 > --- a/arch/arm64/kvm/trace_arm.h > +++ b/arch/arm64/kvm/trace_arm.h > @@ -42,7 +42,7 @@ TRACE_EVENT(kvm_exit, > __entry->vcpu_pc = vcpu_pc; > ), > > - TP_printk("%s: HSR_EC: 0x%04x (%s), PC: 0x%08lx", > + TP_printk("%s: ESR_EC: 0x%04x (%s), PC: 0x%08lx", > __print_symbolic(__entry->ret, kvm_arm_exception_type), > __entry->esr_ec, > __print_symbolic(__entry->esr_ec, kvm_arm_exception_class), Likewise, isn't all the tracepoint format stuff ABI? I'm not comfortable that we can change this. Thanks, Mark. > @@ -50,27 +50,27 @@ TRACE_EVENT(kvm_exit, > ); > > TRACE_EVENT(kvm_guest_fault, > - TP_PROTO(unsigned long vcpu_pc, unsigned long hsr, > + TP_PROTO(unsigned long vcpu_pc, unsigned long esr, > unsigned long hxfar, > unsigned long long ipa), > - TP_ARGS(vcpu_pc, hsr, hxfar, ipa), > + TP_ARGS(vcpu_pc, esr, hxfar, ipa), > > TP_STRUCT__entry( > __field( unsigned long, vcpu_pc ) > - __field( unsigned long, hsr ) > + __field( unsigned long, esr ) > __field( unsigned long, hxfar ) > __field( unsigned long long, ipa ) > ), > > TP_fast_assign( > __entry->vcpu_pc = vcpu_pc; > - __entry->hsr = hsr; > + __entry->esr = esr; > __entry->hxfar = hxfar; > __entry->ipa = ipa; > ), > > - TP_printk("ipa %#llx, hsr %#08lx, hxfar %#08lx, pc %#08lx", > - __entry->ipa, __entry->hsr, > + TP_printk("ipa %#llx, esr %#08lx, hxfar %#08lx, pc %#08lx", > + __entry->ipa, __entry->esr, > __entry->hxfar, __entry->vcpu_pc) > ); > > diff --git a/arch/arm64/kvm/trace_handle_exit.h b/arch/arm64/kvm/trace_handle_exit.h > index 2c56d1e0f5bd..94ef1a98e609 100644 > --- a/arch/arm64/kvm/trace_handle_exit.h > +++ b/arch/arm64/kvm/trace_handle_exit.h > @@ -139,18 +139,18 @@ TRACE_EVENT(trap_reg, > ); > > TRACE_EVENT(kvm_handle_sys_reg, > - TP_PROTO(unsigned long hsr), > - TP_ARGS(hsr), > + TP_PROTO(unsigned long esr), > + TP_ARGS(esr), > > TP_STRUCT__entry( > - __field(unsigned long, hsr) > + __field(unsigned long, esr) > ), > > TP_fast_assign( > - __entry->hsr = hsr; > + __entry->esr = esr; > ), > > - TP_printk("HSR 0x%08lx", __entry->hsr) > + TP_printk("ESR 0x%08lx", __entry->esr) > ); > > TRACE_EVENT(kvm_sys_access, > -- > 2.23.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel