From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4845AC433E0 for ; Wed, 1 Jul 2020 17:31:46 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 152A020771 for ; Wed, 1 Jul 2020 17:31:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="nosP4ctq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 152A020771 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Y3sihkonFEQMXWD6p3Dl1qxKSpwaXivD6vMUijqbmwI=; b=nosP4ctqGFVR4qyQyWm9B6Kg7 lkmplTwvOEPb5mtEJVJeEcYU98jSoYOpnqRX1vwZbiWiBb7wT7HopDStyZMJ8Xry/MGvlUSWC/Sl6 eB+HO79PKWHBGBR9IpB95wU1eEj9wq6zDKfm8hfYyeVUJRyiislz0F9xJTakBguDP5l9reaQJ4QOV FzgDgMl7MfJW/VwHFfHd6+wholst5EqobUtN5XGFP+AKEGFNI4OPoZyYnh7WsdoiTykBH2CzuH8/a hR1aYCbBIx9yQoUg7knjAcPif8NPmG7odfd2eALb+DnlIZCRSoQ14aXujC/oeIiYnrIzXG0Is/wZe Db1jCUnOQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqgYj-0000JT-3S; Wed, 01 Jul 2020 17:30:09 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqgYh-0000J5-Ex for linux-arm-kernel@lists.infradead.org; Wed, 01 Jul 2020 17:30:08 +0000 Received: from gaia (unknown [95.146.230.158]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CAE4020771; Wed, 1 Jul 2020 17:30:04 +0000 (UTC) Date: Wed, 1 Jul 2020 18:30:02 +0100 From: Catalin Marinas To: Andrew Morton Subject: Re: [PATCH v5 06/25] mm: Add PG_ARCH_2 page flag Message-ID: <20200701173001.GG5191@gaia> References: <20200624175244.25837-1-catalin.marinas@arm.com> <20200624175244.25837-7-catalin.marinas@arm.com> <20200624113307.6165b3db2404c9d37b870a90@linux-foundation.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200624113307.6165b3db2404c9d37b870a90@linux-foundation.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_133007_581396_B6DEF916 X-CRM114-Status: GOOD ( 20.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Szabolcs Nagy , Andrey Konovalov , Kevin Brodsky , Steven Price , Peter Collingbourne , linux-mm@kvack.org, Vincenzo Frascino , Will Deacon , Dave P Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 24, 2020 at 11:33:07AM -0700, Andrew Morton wrote: > On Wed, 24 Jun 2020 18:52:25 +0100 Catalin Marinas wrote: > > From: Steven Price > > For arm64 MTE support it is necessary to be able to mark pages that > > contain user space visible tags that will need to be saved/restored e.g. > > when swapped out. > > > > To support this add a new arch specific flag (PG_ARCH_2) that arch code > > can opt into using ARCH_USES_PG_ARCH_2. > > > > ... > > > > --- a/fs/proc/page.c > > +++ b/fs/proc/page.c > > @@ -217,6 +217,9 @@ u64 stable_page_flags(struct page *page) > > u |= kpf_copy_bit(k, KPF_PRIVATE_2, PG_private_2); > > u |= kpf_copy_bit(k, KPF_OWNER_PRIVATE, PG_owner_priv_1); > > u |= kpf_copy_bit(k, KPF_ARCH, PG_arch_1); > > +#ifdef CONFIG_ARCH_USES_PG_ARCH_2 > > + u |= kpf_copy_bit(k, KPF_ARCH_2, PG_arch_2); > > +#endif > > Do we need CONFIG_ARCH_USES_PG_ARCH_2? What would be the downside to > giving every architecture a PG_arch_2, but only arm64 uses it (at > present)? It turns out we have another issue with this flag. PG_arch_2 in the arm64 MTE patches is used to mark a page as having valid tags. During set_pte_at(), if the mapping type is tagged, we set PG_arch_2 (also setting it in other cases like copy_page). In combination with THP and swap (and some stress-testing to force swap-out), the kernel ends up clearing PG_arch_2 in __split_huge_page_tail(), causing a subsequent set_pte_at() to zero valid tags stored by user. The quick fix is to add an arch_huge_page_flags_split_preserve macro (need to think of a shorter name) which adds 1L << PG_arch_2 to the preserve list in the above mentioned function. However, I wonder whether it's safe to add both PG_arch_1 and PG_arch_2 to this list. At least on arm and arm64, PG_arch_1 is used to mark a page as D-cache clean (and don't need to do this again after splitting a pmd): diff --git a/mm/huge_memory.c b/mm/huge_memory.c index 78c84bee7e29..22b3236a6dd8 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c @@ -2364,6 +2364,10 @@ static void __split_huge_page_tail(struct page *head, int tail, (1L << PG_workingset) | (1L << PG_locked) | (1L << PG_unevictable) | + (1L << PG_arch_1) | +#ifdef CONFIG_64BIT + (1L << PG_arch_2) | +#endif (1L << PG_dirty))); /* ->mapping in first tail page is compound_mapcount */ Thanks. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel