From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAEC2C433E0 for ; Thu, 2 Jul 2020 12:13:05 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9516720772 for ; Thu, 2 Jul 2020 12:13:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="2U+Pq0S3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9516720772 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nsBe83mlS4rpHneihlrlWx1Y7tdHEuXkU9AIQewBt18=; b=2U+Pq0S3zfOpXbYkS/rdmOVPU ylNk7ZG9k/V6WIXjtepTPs8TRwIYMPd210ysGQ7kflFr3YP8Xu61hN/o5EIQo12PSNd7x2sGFVQsx NaCcqM+l+qQizcMFj1XhtOks6eKIXDISxXHCm5tVZ4PJTqM843YEOIEK5ltuWjUdvbjUExNugXFAF OCwn0ZTcwIilX0ZXKyKId85Lxo7rivqX1NLfMMl8nIO4jyMCMT083lUdHV2mk3ONlO+FLZOBsT6TB pFr/TasOyincPeH8JC95DqLVZ8ljYG+V4ENUpvsuXScfqVrYE3UCgFc+z3Y9s/u+531zDH8XlyptV bZIZZJ0oQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqy46-0003Jp-LE; Thu, 02 Jul 2020 12:11:42 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqy44-0003JH-IF for linux-arm-kernel@lists.infradead.org; Thu, 02 Jul 2020 12:11:41 +0000 Received: from gaia (unknown [95.146.230.158]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 64C2120772; Thu, 2 Jul 2020 12:11:38 +0000 (UTC) Date: Thu, 2 Jul 2020 13:11:35 +0100 From: Catalin Marinas To: Anshuman Khandual Subject: Re: [RFC V2 1/2] arm64/mm: Change THP helpers per generic memory semantics Message-ID: <20200702121135.GD22241@gaia> References: <1592226918-26378-1-git-send-email-anshuman.khandual@arm.com> <1592226918-26378-2-git-send-email-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1592226918-26378-2-git-send-email-anshuman.khandual@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_081140_763388_2A1AE5DC X-CRM114-Status: GOOD ( 23.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Suzuki Poulose , Marc Zyngier , linux-kernel@vger.kernel.org, linux-mm@kvack.org, ziy@nvidia.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Anshuman, On Mon, Jun 15, 2020 at 06:45:17PM +0530, Anshuman Khandual wrote: > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -353,15 +353,92 @@ static inline int pmd_protnone(pmd_t pmd) > } > #endif > > +#define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_TABLE) > +#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_SECT) > + > +#ifdef CONFIG_TRANSPARENT_HUGEPAGE > /* > - * THP definitions. > + * PMD Level Encoding (THP Enabled) > + * > + * 0b00 - Not valid Not present NA > + * 0b10 - Not valid Present Huge (Splitting) > + * 0b01 - Valid Present Huge (Mapped) > + * 0b11 - Valid Present Table (Mapped) > */ I wonder whether it would be easier to read if we add a dedicated PMD_SPLITTING bit, only when bit 0 is cleared. This bit can be high (say 59), it doesn't really matter as the entry is not valid. The only doubt I have is that pmd_mkinvalid() is used in other contexts when it's not necessarily splitting a pmd (search for the pmdp_invalidate() calls). So maybe a better name like PMD_PRESENT with a comment that pmd_to_page() is valid (i.e. no migration or swap entry). Feel free to suggest a better name. > +static inline pmd_t pmd_mksplitting(pmd_t pmd) > +{ > + unsigned long val = pmd_val(pmd); > > -#ifdef CONFIG_TRANSPARENT_HUGEPAGE > -#define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT)) > + return __pmd((val & ~PMD_TYPE_MASK) | PMD_TABLE_BIT); > +} > + > +static inline pmd_t pmd_clrsplitting(pmd_t pmd) > +{ > + unsigned long val = pmd_val(pmd); > + > + return __pmd((val & ~PMD_TYPE_MASK) | PMD_TYPE_SECT); > +} > + > +static inline bool pmd_splitting(pmd_t pmd) > +{ > + unsigned long val = pmd_val(pmd); > + > + if ((val & PMD_TYPE_MASK) == PMD_TABLE_BIT) > + return true; > + return false; > +} > + > +static inline bool pmd_mapped(pmd_t pmd) > +{ > + return pmd_sect(pmd); > +} > + > +static inline pmd_t pmd_mkinvalid(pmd_t pmd) > +{ > + /* > + * Invalidation should not have been invoked on > + * a PMD table entry. Just warn here otherwise. > + */ > + WARN_ON(pmd_table(pmd)); > + return pmd_mksplitting(pmd); > +} And here we wouldn't need t worry about table checks. > +static inline int pmd_present(pmd_t pmd); > + > +static inline int pmd_trans_huge(pmd_t pmd) > +{ > + if (!pmd_present(pmd)) > + return 0; > + > + if (!pmd_val(pmd)) > + return 0; > + > + if (pmd_mapped(pmd)) > + return 1; > + > + if (pmd_splitting(pmd)) > + return 1; > + return 0; Doesn't your new pmd_present() already check for splitting? I think checking for bit 0 and the new PMD_PRESENT. That would be similar to what we do with PTE_PROT_NONE. Actually, you could use the same bit for both. > +} > + > +void set_pmd_at(struct mm_struct *mm, unsigned long addr, > + pmd_t *pmdp, pmd_t pmd); > #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ > > -#define pmd_present(pmd) pte_present(pmd_pte(pmd)) > +static inline int pmd_present(pmd_t pmd) > +{ > + pte_t pte = pmd_pte(pmd); > + > + if (pte_present(pte)) > + return 1; > + > +#ifdef CONFIG_TRANSPARENT_HUGEPAGE > + if (pmd_splitting(pmd)) > + return 1; > +#endif > + return 0; > +} [...] > diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c > index 990929c8837e..337519031115 100644 > --- a/arch/arm64/mm/mmu.c > +++ b/arch/arm64/mm/mmu.c > @@ -22,6 +22,8 @@ > #include > #include > #include > +#include > +#include > > #include > #include > @@ -1483,3 +1485,21 @@ static int __init prevent_bootmem_remove_init(void) > } > device_initcall(prevent_bootmem_remove_init); > #endif > + > +#ifdef CONFIG_TRANSPARENT_HUGEPAGE > +void set_pmd_at(struct mm_struct *mm, unsigned long addr, > + pmd_t *pmdp, pmd_t pmd) > +{ > + /* > + * PMD migration entries need to retain splitting PMD > + * representation created with pmdp_invalidate(). But > + * any non-migration entry which just might have been > + * invalidated previously, still need be a normal huge > + * page. Hence selectively clear splitting entries. > + */ > + if (!is_migration_entry(pmd_to_swp_entry(pmd))) > + pmd = pmd_clrsplitting(pmd); > + > + set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd)); > +} > +#endif So a pmdp_invalidate() returns the old pmd. Do we ever need to rebuild a pmd based on the actual bits in the new invalidated pmdp? Wondering how the table bit ends up here that we need to pmd_clrsplitting(). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel