From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1078CC433E0 for ; Mon, 6 Jul 2020 17:14:08 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0695206B6 for ; Mon, 6 Jul 2020 17:14:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iqM9q9sn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D0695206B6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=e9TCnAUzOuQFysQOZBDfC2I+Q5OrC3nD6EeKS99pI6g=; b=iqM9q9snTUYhk7LfdBWTX/+sZ nhgFTVOAsU/gcfEuXp6rufN8GfwW7MXzJep8krjjF1GJqnRt3af8p0dxRHNG9WB+fUtCBgU0QPM8l lcXfId2LqqnWC+u8Oqmn/d5bvZrjGr3Uu9zImV0GrpKBUV+NiHW2tgGxqrPx9aOD39u7C/Gb07hgz FG+qzQCCKZLzozxVrUQRPJiK12raPO74XKyc/AHe6GNUMdONCSMqN9sIvR7MZV0LfZNuueDfhjTAT QjLdDIMC0Q7rRzNutLpQOtqnbgmgdupbI6GzNz596SebFzZCMv6wyLotaxnxpeT+LxLcIFE8DS0Zi 8eLWAdHFQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jsUfo-0000dh-7J; Mon, 06 Jul 2020 17:12:56 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jsUfl-0000ce-Ll for linux-arm-kernel@lists.infradead.org; Mon, 06 Jul 2020 17:12:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BA69F31B; Mon, 6 Jul 2020 10:12:52 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.13.106]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B58F93F68F; Mon, 6 Jul 2020 10:12:50 -0700 (PDT) Date: Mon, 6 Jul 2020 18:12:48 +0100 From: Mark Rutland To: Marc Zyngier Subject: Re: [PATCH v2 4/4] arm64: Rework ARM_ERRATUM_1414080 handling Message-ID: <20200706171248.GC61340@C02TD0UTHF1T.local> References: <20200706163802.1836732-1-maz@kernel.org> <20200706163802.1836732-5-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200706163802.1836732-5-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200706_131253_965452_A8432485 X-CRM114-Status: GOOD ( 19.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kernel-team@android.com, Catalin Marinas , Daniel Lezcano , linux-kernel@vger.kernel.org, Thomas Gleixner , Vincenzo Frascino , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 06, 2020 at 05:38:02PM +0100, Marc Zyngier wrote: > The current handling of erratum 1414080 has the side effect that > cntkctl_el1 can get changed for both 32 and 64bit tasks. > > This isn't a problem so far, but if we ever need to mitigate another > of these errata on the 64bit side, we'd better keep the messing with > cntkctl_el1 local to 32bit tasks. > > For that, make sure that on entering the kernel from a 32bit tasks, > userspace access to cntvct gets enabled, and disabled returning to > userspace, while it never gets changed for 64bit tasks. > > Signed-off-by: Marc Zyngier The asm looks sound to me. Suggestion below, but either way: Reviewed-by: Mark Rutland > --- > arch/arm64/kernel/entry.S | 40 +++++++++++++++++++++++---------------- > 1 file changed, 24 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > index 5304d193c79d..8f51f3273bc7 100644 > --- a/arch/arm64/kernel/entry.S > +++ b/arch/arm64/kernel/entry.S > @@ -167,6 +167,19 @@ alternative_cb_end > stp x28, x29, [sp, #16 * 14] > > .if \el == 0 > + .if \regsize == 32 > + // If we come back from a 32bit task on a system affected by > + // 1418040, let's reenable userspace access to the virtual counter. > +#ifdef CONFIG_ARM64_ERRATUM_1418040 > +alternative_if_not ARM64_WORKAROUND_1418040 > + b .L__entry_skip_wa_1418040\@ > +alternative_else_nop_endif > + mrs x0, cntkctl_el1 > + orr x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN > + msr cntkctl_el1, x0 > +.L__entry_skip_wa_1418040\@: > +#endif Given this is only 3 instructions, it might be clearer to remove the branch and label and NOP the whole thing for legibility: | #ifdef CONFIG_ARM64_ERRATUM_1418040 | alternative_if ARM64_WORKAROUND_1418040 | mrs x0. cntkctl_el1 | orr x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN | msr cntkctl_el1, x0 | alternative_else_nop_endif | #endif ... and likewise for the clearing case. Regardless, this looks sound to me, so take your pick. :) Mark. > + .endif > clear_gp_regs > mrs x21, sp_el0 > ldr_this_cpu tsk, __entry_task, x20 > @@ -318,7 +331,17 @@ alternative_else_nop_endif > ldr x23, [sp, #S_SP] // load return stack pointer > msr sp_el0, x23 > tst x22, #PSR_MODE32_BIT // native task? > - b.eq 3f > + b.eq 4f > + > +#ifdef CONFIG_ARM64_ERRATUM_1418040 > +alternative_if_not ARM64_WORKAROUND_1418040 > + b 3f > +alternative_else_nop_endif > + mrs x1, cntkctl_el1 > + bic x1, x1, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN > + msr cntkctl_el1, x1 > +3: > +#endif > > #ifdef CONFIG_ARM64_ERRATUM_845719 > alternative_if ARM64_WORKAROUND_845719 > @@ -330,22 +353,7 @@ alternative_if ARM64_WORKAROUND_845719 > #endif > alternative_else_nop_endif > #endif > -3: > -#ifdef CONFIG_ARM64_ERRATUM_1418040 > -alternative_if_not ARM64_WORKAROUND_1418040 > - b 4f > -alternative_else_nop_endif > - /* > - * if (x22.mode32 == cntkctl_el1.el0vcten) > - * cntkctl_el1.el0vcten = ~cntkctl_el1.el0vcten > - */ > - mrs x1, cntkctl_el1 > - eon x0, x1, x22, lsr #3 > - tbz x0, #1, 4f > - eor x1, x1, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN > - msr cntkctl_el1, x1 > 4: > -#endif > scs_save tsk, x0 > > /* No kernel C function calls after this as user keys are set. */ > -- > 2.27.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel