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From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: smoch@web.de, Fabio Estevam <festevam@gmail.com>,
	linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] ARM: dts: imx6qdl-sabresd: Add an mdio node
Date: Mon, 13 Jul 2020 10:04:15 -0300	[thread overview]
Message-ID: <20200713130416.20040-1-festevam@gmail.com> (raw)

imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.

The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- None. Only inverted the order of the patches

 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 28b35ccb3757..6524ad4b0010 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -203,9 +203,20 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
+	phy-handle = <&phy>;
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 	fsl,magic-packet;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@1 {
+			reg = <1>;
+			qca,clk-out-frequency = <125000000>;
+		};
+	};
 };
 
 &hdmi {
-- 
2.17.1


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             reply	other threads:[~2020-07-13 13:06 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 13:04 Fabio Estevam [this message]
2020-07-13 13:04 ` [PATCH v2 2/2] ARM: dts: imx6qdl-sabresd: Pass reset-assert-us Fabio Estevam
2020-07-14  9:50   ` Soeren Moch
2020-07-14  9:49 ` [PATCH v2 1/2] ARM: dts: imx6qdl-sabresd: Add an mdio node Sören Moch
2020-07-20  2:19 ` Shawn Guo

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