From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6D49C433E1 for ; Mon, 13 Jul 2020 17:02:52 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8FC1B20738 for ; Mon, 13 Jul 2020 17:02:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="tniuOb9k"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="ITjXS7Z2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8FC1B20738 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/xq4tp7Bx5LNiIH6khBskFXYC52BMFffM2XOMQYHWwg=; b=tniuOb9k0epzCuFw2ww+L3N7J Yk75j8O3uosVZovC1X9N1FwibnQ3jGbxqztHeKuH2DIddxWpU+MpuJWqnrwM11o5llWGl6xYTmg8K zBtjjTVztl+YJlOr41C6ou2vCRDM4FX1b6WbS+5HZJgX1AAtINVSVumx3aVtj6AzEg2pfIVuWzm7Z N1DTCqowpp6pdCihdypbYgAxHIAep+B+QJmWf1vZJnzh8T6gto/rw3B/0fLvZh5nMz3EV4uS5WgzZ 6k8k8DQ4qw7hGia5GUiyuNKQzNgE/TETe2zSo1smVzJybRa9byKT5z/nGUWKUlcQ4ttaUNufMhudo D/2HU2Ryg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv1ph-0004oU-2C; Mon, 13 Jul 2020 17:01:37 +0000 Received: from m43-7.mailgun.net ([69.72.43.7]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv1pZ-0004m9-FJ for linux-arm-kernel@lists.infradead.org; Mon, 13 Jul 2020 17:01:35 +0000 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1594659694; h=In-Reply-To: Content-Type: MIME-Version: References: Message-ID: Subject: Cc: To: From: Date: Sender; bh=KRdL10OGiMuFb36lTpuRBRxlxK8Gr9DMI+wG0F30ZmI=; b=ITjXS7Z2HoxY7F4Qn0i2GYY0LZqNk+izZHqMBvEOUXO117n1YZ/67FTZQAH8d/0jZRCzo+E9 GHX7XnQWdQYUDtQCTfmlnKkL3tfjFd24hnFsmBgk/H4fc+vHLcdlIEgni7NuVTkpOZfgHqHU 5u4tNaqhHv33A0cugAwzcdvLMpg= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyJiYzAxZiIsICJsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmciLCAiYmU5ZTRhIl0= Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n13.prod.us-east-1.postgun.com with SMTP id 5f0c933d427cd557662ce2dc (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 13 Jul 2020 17:00:45 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id EA4B4C43391; Mon, 13 Jul 2020 17:00:44 +0000 (UTC) Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7C255C433C6; Mon, 13 Jul 2020 17:00:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7C255C433C6 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org Date: Mon, 13 Jul 2020 11:00:32 -0600 From: Jordan Crouse To: Will Deacon Subject: Re: [PATCH] iommu/arm-smmu: Add a init_context_bank implementation hook Message-ID: <20200713170032.GH21059@jcrouse1-lnx.qualcomm.com> Mail-Followup-To: Will Deacon , linux-arm-msm@vger.kernel.org, Joerg Roedel , Robin Murphy , freedreno@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20200611223656.4724-1-jcrouse@codeaurora.org> <20200713151123.GB3072@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200713151123.GB3072@willie-the-truck> User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_130134_355986_4F50E722 X-CRM114-Status: GOOD ( 20.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Joerg Roedel , Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 13, 2020 at 04:11:23PM +0100, Will Deacon wrote: > On Thu, Jun 11, 2020 at 04:36:56PM -0600, Jordan Crouse wrote: > > Add a new implementation hook to allow the implementation specific code > > to tweek the context bank configuration just before it gets written. > > The first user will be the Adreno GPU implementation to turn on > > SCTLR.HUPCF to ensure that a page fault doesn't terminating pending > > transactions. Doing so could hang the GPU if one of the terminated > > transactions is a CP read. > > > > This depends on the arm-smmu adreno SMMU implementation [1]. > > > > [1] https://patchwork.kernel.org/patch/11600943/ > > > > Signed-off-by: Jordan Crouse > > --- > > > > drivers/iommu/arm-smmu-qcom.c | 13 +++++++++++++ > > drivers/iommu/arm-smmu.c | 28 +++++++++++++--------------- > > drivers/iommu/arm-smmu.h | 11 +++++++++++ > > 3 files changed, 37 insertions(+), 15 deletions(-) > > This looks straightforward enough, but I don't want to merge this without > a user and Sai's series has open questions afaict. Not sure what you mean by a user in this context? Are you referring to https://patchwork.kernel.org/patch/11628541/? > Will -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel