From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C45B4C433ED for ; Mon, 13 Jul 2020 17:47:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95F0220771 for ; Mon, 13 Jul 2020 17:47:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PxEKwtqY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 95F0220771 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=oDpIGwOT7Nw7eAElhXp6+GIO5rjNUqx4ARx0GXjIF34=; b=PxEKwtqYmxbedZ1rBUMcY6Q0X FO7eMGvwg5F/q9eeRdWVyw11ZnWQYupEt8APd+FdXsrgdRFaC/9z8BSQ3brB0gDKFq31DQhKw8LV0 TvlhLhKEH9nXgRPa/axfjOPPrh/vFQKhybb9SLGEKlCRr/wWBWRg5EzeOFdASvNUWBO9M4WUEkqCH qxPKUoZ3bYQ6MPfGntOQJGz1Lwx1ehkGDfCiKycHjga4i4xeDJFAt5EtKJIxVdG4EQbZXXTP3J9ZW LLfCsdRYpAPHFvkx9x6w970kBusL8SnsapO3/8Wytgtp1nTMSxbC6pMA9TM3YD1iU26r7VZOoRjt3 f4U08vy8A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv2WL-0002fc-26; Mon, 13 Jul 2020 17:45:41 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv2WH-0002f5-WA for linux-arm-kernel@lists.infradead.org; Mon, 13 Jul 2020 17:45:38 +0000 Received: from gaia (unknown [95.146.230.158]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4CCB220738; Mon, 13 Jul 2020 17:45:35 +0000 (UTC) Date: Mon, 13 Jul 2020 18:45:32 +0100 From: Catalin Marinas To: Steven Price Subject: Re: [PATCH v6 02/26] arm64: mte: CPU feature detection and initial sysreg configuration Message-ID: <20200713174531.GF15829@gaia> References: <20200703153718.16973-1-catalin.marinas@arm.com> <20200703153718.16973-3-catalin.marinas@arm.com> <2fb4b560-fb2f-7689-05f7-d908b55cd1eb@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2fb4b560-fb2f-7689-05f7-d908b55cd1eb@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_134538_134566_DBF39FD9 X-CRM114-Status: GOOD ( 23.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Will Deacon , Suzuki K Poulose , Szabolcs Nagy , Andrey Konovalov , Kevin Brodsky , linux-mm@kvack.org, Andrew Morton , Vincenzo Frascino , Peter Collingbourne , Dave P Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 13, 2020 at 11:08:15AM +0100, Steven Price wrote: > On 03/07/2020 16:36, Catalin Marinas wrote: > > From: Vincenzo Frascino > > > > Add the cpufeature and hwcap entries to detect the presence of MTE on > > the boot CPUs (primary and secondary). Any late secondary CPU not > > supporting the feature, if detected during boot, will be parked. > > > > In addition, add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling > > MTE. Without subsequent setting of MAIR, these bits do not have an > > effect on tag checking. > > > > Signed-off-by: Vincenzo Frascino > > Co-developed-by: Catalin Marinas > > Signed-off-by: Catalin Marinas > > Cc: Will Deacon > > Cc: Suzuki K Poulose > > This commit causes the feature bit to be exposed to a guest, but we > don't at this point have any way of handling a guest which attempts to > use MTE. > > This is 'fixed' by the first patch of my KVM MTE series[1], but perhaps > the chunk modifying arch/arm64/kvm/sys_regs.c (see below) should be included here > instead? That way we hide the feature until we're ready for a guest with > MTE support. > > Steve > [1] https://lore.kernel.org/r/20200713100102.53664-2-steven.price@arm.com > > ----8<---- > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index baf5ce9225ce..5ca974c93bd4 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1104,6 +1104,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, > if (!vcpu_has_sve(vcpu)) > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); > val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT); > + } else if (id == SYS_ID_AA64PFR1_EL1) { > + val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT); > } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) { > val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) | > (0xfUL << ID_AA64ISAR1_API_SHIFT) | Thanks Steven. I thought this worked on explicitly enabling the CPUID for guests but I think I only checked with an old host kernel which was masking the ID field anyway. I tried it again now and it indeed fails. I'll fold this in. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel