From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36DFDC433E5 for ; Tue, 14 Jul 2020 02:50:41 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F2D0B2192A for ; Tue, 14 Jul 2020 02:50:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="pcq3M/Tf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F2D0B2192A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=WDB0Nugdr5yvpeCbsx5kRiZvNmNu9jo5wwajBWsiwGo=; b=pcq3M/TfuPLDNLbMYD0/Vvm4n 7SKX/fSEG4JmbS2cDIu0pQPtv0A0I8BwasaAv+cgTPA+rFVf8V2A9MRzV4mG/QTYwI85ZJT4ElVld iHedxMcbcdZn/iMYkP7A74NJfdvPGwveT+kWvJOXZHKoe3PqKU/rXXRcU0XTAq8qgl/lDe5qTVLV3 XpGh+GAQdqYGut+svtElmk4z6tURiTirBMXqTOGbW6fPYXnWQfv/V8biCyKqkzWdpPaFGmPDtrgnY 8lf4fGyOxrwp57qxdlBEOngTDF1uFEy9Tpt+bsWJqIx1+UpFzqymimhGiF3s6kJKzDglzQCZXR0dM 01Bbql+Ew==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvB0O-0003Ho-CV; Tue, 14 Jul 2020 02:49:16 +0000 Received: from mail-il1-f196.google.com ([209.85.166.196]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvB0M-0003HN-Rt for linux-arm-kernel@lists.infradead.org; Tue, 14 Jul 2020 02:49:15 +0000 Received: by mail-il1-f196.google.com with SMTP id t4so13048319iln.1 for ; Mon, 13 Jul 2020 19:49:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=DdQRU+re2daApc1buZh/NOScJMoADL35yGQLsQdXB0M=; b=bgy9rvbzgF1Xk9YopQ+jI6u40a+7xvovF6s8ghn13+G7s36YXmUYfqGhbBG6mdQB+y erHSpfXkSL+1r0VISZXx2XF7NQCM2amlCptOejE2dDmDjrOiZjuthuzpNyal5L7AJqBi UwfPbE6HTckpMrXxGzmWrHk6sapUaNUfFi3nGA1rQKLHWjXAn0E+ub69nKDfS01puVPx +eTNabssSP83Kk5qSbhj4WQtA1AlW7FAShurH1zugrN+fjXQkcBK6+PdAc60BJs0D3O7 ztkjTPF0kLoROocFOaYeYDemDoIXqgQFlSXURGXh+oPQij+AHIarAlzRp1U5SClAI77j i+fQ== X-Gm-Message-State: AOAM530ixEblAqrJ5ghKdx0OCFnnVIaHgqj9s2aXuWGr0DUbOqlW2iMp HEGgSVtaa7oWvaTYlp0m/Q== X-Google-Smtp-Source: ABdhPJz9igZQqkIyHCZ5N1hs9WTl0MnTGAZmaW5l4R56IePZCqGF6EM/cUpsjUEx18PhvChQvcjoqA== X-Received: by 2002:a92:c00d:: with SMTP id q13mr2499962ild.222.1594694954000; Mon, 13 Jul 2020 19:49:14 -0700 (PDT) Received: from xps15 ([64.188.179.252]) by smtp.gmail.com with ESMTPSA id f18sm8489104ion.47.2020.07.13.19.49.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 19:49:13 -0700 (PDT) Received: (nullmailer pid 1187292 invoked by uid 1000); Tue, 14 Jul 2020 02:49:12 -0000 Date: Mon, 13 Jul 2020 20:49:12 -0600 From: Rob Herring To: Adrian Pop Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support. Message-ID: <20200714024912.GA1184333@bogus> References: <20200702172714.158786-1-pop.adrian61@gmail.com> <20200702172714.158786-2-pop.adrian61@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200702172714.158786-2-pop.adrian61@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_224914_942472_6F008C2C X-CRM114-Status: GOOD ( 17.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Torgue , linux-kernel@vger.kernel.org, Maxime Coquelin , Lee Jones , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 02, 2020 at 08:27:14PM +0300, Adrian Pop wrote: > STM32f769-disco features a 4" MIPI DSI display: add support for it. > On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated > memory pool for DMA with no-cache attribute which is located at the end of > RAM. > > Signed-off-by: Adrian Pop > --- > arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++ > arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++ > 2 files changed, 83 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi > index 93c063796780..577a812ca01c 100644 > --- a/arch/arm/boot/dts/stm32f746.dtsi > +++ b/arch/arm/boot/dts/stm32f746.dtsi > @@ -48,6 +48,19 @@ / { > #address-cells = <1>; > #size-cells = <1>; > > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + linux,dma { Build your DT with W=1. This will have a warning. > + compatible = "shared-dma-pool"; > + linux,dma-default; > + no-map; > + reg = <0xc0f00000 0x100000>; > + }; > + }; > + > clocks { > clk_hse: clk-hse { > #clock-cells = <0>; > @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin { > }; > > soc { > + ltdc: display-controller@40016800 { > + compatible = "st,stm32-ltdc"; > + reg = <0x40016800 0x200>; > + interrupts = <88>, <89>; > + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; > + clocks = <&rcc 1 CLK_LCD>; > + clock-names = "lcd"; > + status = "disabled"; > + }; > + > + dsi: dsi@40016c00 { > + compatible = "st,stm32-dsi"; > + reg = <0x40016c00 0x800>; > + interrupts = <98>; > + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>; > + clock-names = "pclk", "ref"; > + resets = <&rcc STM32F7_APB2_RESET(DSI)>; > + reset-names = "apb"; > + status = "disabled"; > + }; > + > timer2: timer@40000000 { > compatible = "st,stm32-timer"; > reg = <0x40000000 0x400>; > diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts > index 1626e00bb2cb..a9e81b49809c 100644 > --- a/arch/arm/boot/dts/stm32f769-disco.dts > +++ b/arch/arm/boot/dts/stm32f769-disco.dts > @@ -153,3 +153,52 @@ &usbotg_hs { > pinctrl-names = "default"; > status = "okay"; > }; > + > +&dsi { > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + dsi_in: endpoint { > + remote-endpoint = <<dc_out_dsi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + dsi_out: endpoint { > + remote-endpoint = <&dsi_in_panel>; > + }; > + }; > + > + }; > + > + panel: panel { > + compatible = "orisetech,otm8009a"; > + reg = <0>; > + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>; > + status = "okay"; Don't need status. Enabled is the default. > + > + port { > + dsi_in_panel: endpoint { > + remote-endpoint = <&dsi_out>; > + }; > + }; > + }; > +}; > + > +<dc { > + status = "okay"; > + > + port { > + ltdc_out_dsi: endpoint { > + remote-endpoint = <&dsi_in>; > + }; > + }; > +}; > -- > 2.27.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel