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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id h7sm5551458pfq.15.2020.07.16.10.19.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2020 10:19:05 -0700 (PDT) Date: Thu, 16 Jul 2020 11:19:03 -0600 From: Mathieu Poirier To: Rob Herring Subject: Re: [PATCH v2 1/4] dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs Message-ID: <20200716171903.GA3286345@xps15> References: <20200630024922.32491-1-s-anna@ti.com> <20200630024922.32491-2-s-anna@ti.com> <20200714171553.GA2522956@bogus> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200714171553.GA2522956@bogus> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200716_131909_864914_5C7E1EE9 X-CRM114-Status: GOOD ( 25.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, stefanos@xilinx.com, Lokesh Vutla , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , BLEVINSK@xilinx.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, On Tue, Jul 14, 2020 at 11:15:53AM -0600, Rob Herring wrote: > On Mon, Jun 29, 2020 at 09:49:19PM -0500, Suman Anna wrote: > > The Texas Instruments K3 family of SoCs have one or more dual-core > > Arm Cortex R5F processor subsystems/clusters (R5FSS). The clusters > > can be split between multiple voltage domains as well. Add the device > > tree bindings document for these R5F subsystem devices. These R5F > > processors do not have an MMU, and so require fixed memory carveout > > regions matching the firmware image addresses. The nodes require more > > than one memory region, with the first memory region used for DMA > > allocations at runtime. The remaining memory regions are reserved > > and are used for the loading and running of the R5F remote processors. > > The R5F processors can also optionally use any internal on-chip SRAM > > memories either for executing code or using it as fast-access data. > > > > The added example illustrates the DT nodes for the single R5FSS device > > present on K3 AM65x family of SoCs. > > > > Signed-off-by: Suman Anna > > --- > > v2: > > - Renamed "lockstep-mode" property to "ti,cluster-mode" > > I don't think that's a move in the right direction given this is at > least partially a standard feature. > > As I said before, I'm very hesistant to accept anything here given I > know the desires and activity to define 'system Devicetrees' of which > TI is participating. While maybe an rproc node is sufficient for a > DSP, it seems multiple vendors have R cores and want to define them in > system DT. > > Though the system DT effort has not yet given any thought to what is the > view of one processor or instance to another instance (which is what > this binding is). We'll still need something defined for that, but I'd > expect that to be dependent on what is defined for system DT. Efforts related to the definition of the system DT are under way, something I expect to keep going on for some time to come. I agree with the need to use the system DT to define remote processors and I look forward to the time we can do so. That being said we need to find a concensus on how to move forward with patches that are ready to be merged. What is your opinion on that? Thanks, Mathieu > > Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel