From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E844C433E3 for ; Tue, 21 Jul 2020 12:26:08 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3D93022BEF for ; Tue, 21 Jul 2020 12:26:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="O/+hOuEa" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3D93022BEF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CLLmJd6IWW3tozkB64Vccj2weRZ9dBIKSnJW7dOcHMM=; b=O/+hOuEaxqITNntwzd/5Q+Q5p 9PJia9mVQ8SsSxE/1hAHn9GovGmh5t/1PoAgaqVwBxsaTyJ3BNGAtN3X7G1npIiI+oHO/jMQOUffq 1fs2h1HFVQ2TyiCjRqEJZtp6wJwg53hDYL19vQqalkleekntTjUqAHPmHgvwpzO9SxIrS9uJKF+E+ 3ZrroX5xUbSB7j3SBoZE8J+oZ6KZbI7YtDEMJzg3gKDkrevTnMLGQWWnaSTvPsTL1Vvxp+X4I+Pvv sOAIE0gW/D/RhZR5l2uHyMM9Zx6UD2//pXXBMhNY3Y+9xtv68js7jKvPvie8tl+g2XByGTuFG3KD6 /kDqMOqLA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jxrK5-0003gJ-2w; Tue, 21 Jul 2020 12:24:41 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jxrK2-0003fv-ID for linux-arm-kernel@lists.infradead.org; Tue, 21 Jul 2020 12:24:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D4AD1101E; Tue, 21 Jul 2020 05:24:37 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.3.181]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A452B3F66E; Tue, 21 Jul 2020 05:24:36 -0700 (PDT) Date: Tue, 21 Jul 2020 13:24:34 +0100 From: Mark Rutland To: Will Deacon Subject: Re: [PATCH v5 1/2] arm64: perf: Add support caps in sysfs Message-ID: <20200721122434.GC84703@C02TD0UTHF1T.local> References: <20200721082112.GA13045@willie-the-truck> <1595328573-12751-1-git-send-email-zhangshaokun@hisilicon.com> <159533278323.1070102.5263952218328723641.b4-ty@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <159533278323.1070102.5263952218328723641.b4-ty@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_082438_662850_DF047219 X-CRM114-Status: GOOD ( 12.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shaokun Zhang , catalin.marinas@arm.com, kernel-team@android.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 21, 2020 at 01:07:24PM +0100, Will Deacon wrote: > On Tue, 21 Jul 2020 18:49:32 +0800, Shaokun Zhang wrote: > > ARMv8.4-PMU introduces the PMMIR_EL1 registers and some new PMU events, > > like STALL_SLOT etc, are related to it. Let's add a caps directory to > > /sys/bus/event_source/devices/armv8_pmuv3_0/ and support slots from > > PMMIR_EL1 registers in this entry. The user programs can get the slots > > from sysfs directly. > > Applied to will (for-next/perf), thanks! > > (Please note that I only applied the second patch) > > [2/2] arm64: perf: Expose some new events via sysfs > https://git.kernel.org/will/c/55fdc1f44cd6 FWIW, that looks good to me. Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel