From: Tingwei Zhang <tingwei@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Mike Leach <mike.leach@linaro.org>
Cc: tsoni@codeaurora.org,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Kim Phillips <kim.phillips@arm.com>,
Mao Jinlong <jinlmao@codeaurora.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
coresight@lists.linaro.org, Randy Dunlap <rdunlap@infradead.org>,
Mian Yousaf Kaukab <ykaukab@suse.de>,
Russell King <linux@armlinux.org.uk>,
Tingwei Zhang <tingwei@codeaurora.org>,
Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 05/20] coresight: export global symbols
Date: Thu, 23 Jul 2020 12:27:47 +0800 [thread overview]
Message-ID: <20200723042802.22511-6-tingwei@codeaurora.org> (raw)
In-Reply-To: <20200723042802.22511-1-tingwei@codeaurora.org>
From: Mian Yousaf Kaukab <ykaukab@suse.de>
Export symbols used among coresight modules.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 1 +
drivers/hwtracing/coresight/coresight-sysfs.c | 2 ++
drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 ++++++
drivers/hwtracing/coresight/coresight.c | 8 ++++++++
4 files changed, 17 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 1a3169e69bb1..dcb0592418ae 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -517,6 +517,7 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link)
return 0;
}
+EXPORT_SYMBOL_GPL(etm_perf_symlink);
static ssize_t etm_perf_sink_name_show(struct device *dev,
struct device_attribute *dattr,
diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtracing/coresight/coresight-sysfs.c
index 82afeaf2ccc4..34d2a2d31d00 100644
--- a/drivers/hwtracing/coresight/coresight-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-sysfs.c
@@ -102,6 +102,7 @@ int coresight_add_sysfs_link(struct coresight_sysfs_link *info)
return ret;
}
+EXPORT_SYMBOL_GPL(coresight_add_sysfs_link);
void coresight_remove_sysfs_link(struct coresight_sysfs_link *info)
{
@@ -122,6 +123,7 @@ void coresight_remove_sysfs_link(struct coresight_sysfs_link *info)
info->orig->nr_links--;
info->target->nr_links--;
}
+EXPORT_SYMBOL_GPL(coresight_remove_sysfs_link);
/*
* coresight_make_links: Make a link for a connection from a @orig
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index b29c2db94d96..ad991a37e2d2 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -255,6 +255,7 @@ void tmc_free_sg_table(struct tmc_sg_table *sg_table)
tmc_free_table_pages(sg_table);
tmc_free_data_pages(sg_table);
}
+EXPORT_SYMBOL_GPL(tmc_free_sg_table);
/*
* Alloc pages for the table. Since this will be used by the device,
@@ -340,6 +341,7 @@ struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev,
return sg_table;
}
+EXPORT_SYMBOL_GPL(tmc_alloc_sg_table);
/*
* tmc_sg_table_sync_data_range: Sync the data buffer written
@@ -360,6 +362,7 @@ void tmc_sg_table_sync_data_range(struct tmc_sg_table *table,
PAGE_SIZE, DMA_FROM_DEVICE);
}
}
+EXPORT_SYMBOL_GPL(tmc_sg_table_sync_data_range);
/* tmc_sg_sync_table: Sync the page table */
void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table)
@@ -372,6 +375,7 @@ void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table)
dma_sync_single_for_device(real_dev, table_pages->daddrs[i],
PAGE_SIZE, DMA_TO_DEVICE);
}
+EXPORT_SYMBOL_GPL(tmc_sg_table_sync_table);
/*
* tmc_sg_table_get_data: Get the buffer pointer for data @offset
@@ -401,6 +405,7 @@ ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table,
*bufpp = page_address(data_pages->pages[pg_idx]) + pg_offset;
return len;
}
+EXPORT_SYMBOL_GPL(tmc_sg_table_get_data);
#ifdef ETR_SG_DEBUG
/* Map a dma address to virtual address */
@@ -766,6 +771,7 @@ tmc_etr_get_catu_device(struct tmc_drvdata *drvdata)
return NULL;
}
+EXPORT_SYMBOL_GPL(tmc_etr_get_catu_device);
static inline int tmc_etr_enable_catu(struct tmc_drvdata *drvdata,
struct etr_buf *etr_buf)
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 310b1b825dd1..b7151c5f81b1 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -55,6 +55,7 @@ static struct list_head *stm_path;
*/
const u32 coresight_barrier_pkt[4] = {
0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
+EXPORT_SYMBOL_GPL(coresight_barrier_pkt);
static int coresight_id_match(struct device *dev, void *data)
{
@@ -180,6 +181,7 @@ int coresight_claim_device_unlocked(void __iomem *base)
coresight_clear_claim_tags(base);
return -EBUSY;
}
+EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked);
int coresight_claim_device(void __iomem *base)
{
@@ -191,6 +193,7 @@ int coresight_claim_device(void __iomem *base)
return rc;
}
+EXPORT_SYMBOL_GPL(coresight_claim_device);
/*
* coresight_disclaim_device_unlocked : Clear the claim tags for the device.
@@ -209,6 +212,7 @@ void coresight_disclaim_device_unlocked(void __iomem *base)
*/
WARN_ON_ONCE(1);
}
+EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked);
void coresight_disclaim_device(void __iomem *base)
{
@@ -216,6 +220,7 @@ void coresight_disclaim_device(void __iomem *base)
coresight_disclaim_device_unlocked(base);
CS_LOCK(base);
}
+EXPORT_SYMBOL_GPL(coresight_disclaim_device);
/* enable or disable an associated CTI device of the supplied CS device */
static int
@@ -468,6 +473,7 @@ void coresight_disable_path(struct list_head *path)
{
coresight_disable_path_from(path, NULL);
}
+EXPORT_SYMBOL_GPL(coresight_disable_path);
int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data)
{
@@ -1377,6 +1383,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
return -EAGAIN;
}
+EXPORT_SYMBOL_GPL(coresight_timeout);
struct bus_type coresight_bustype = {
.name = "coresight",
@@ -1553,6 +1560,7 @@ bool coresight_loses_context_with_cpu(struct device *dev)
return fwnode_property_present(dev_fwnode(dev),
"arm,coresight-loses-context-with-cpu");
}
+EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu);
/*
* coresight_alloc_device_name - Get an index for a given device in the
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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next prev parent reply other threads:[~2020-07-23 4:30 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 4:27 [PATCH v4 00/20] coresight: allow to build coresight as modules Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 01/20] coresight: cpu_debug: add module name in Kconfig Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 02/20] coresight: cpu_debug: define MODULE_DEVICE_TABLE Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 03/20] coresight: use IS_ENABLED for CONFIGs that may be modules Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 04/20] coresight: add coresight prefix to barrier_pkt Tingwei Zhang
2020-07-23 4:27 ` Tingwei Zhang [this message]
2020-07-23 4:27 ` [PATCH v4 06/20] coresight: add try_get_module() in coresight_grab_device() Tingwei Zhang
2020-07-23 10:55 ` Mike Leach
2020-07-25 10:05 ` Tingwei Zhang
2020-07-25 13:51 ` Mike Leach
2020-07-26 1:32 ` Tingwei Zhang
2020-07-27 17:04 ` Mike Leach
2020-07-28 1:07 ` Tingwei Zhang
2020-07-28 10:08 ` Mike Leach
2020-07-28 11:17 ` Tingwei Zhang
2020-07-28 20:25 ` Mike Leach
2020-07-23 11:07 ` Greg Kroah-Hartman
2020-07-23 18:04 ` Mathieu Poirier
2020-07-23 18:18 ` Greg Kroah-Hartman
2020-07-23 19:15 ` Mathieu Poirier
2020-07-24 0:41 ` Tingwei Zhang
2020-07-24 7:36 ` Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 07/20] allow to build coresight-stm as a module, for ease of development Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 08/20] coresight: allow etm3x to be built as a module Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 09/20] coresight: allow etm4x " Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 10/20] coresight: allow etb " Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 11/20] coresight: allow tpiu " Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 12/20] coresight: allow tmc " Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 13/20] coresight: remove multiple init calls from funnel driver Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 14/20] coresight: remove multiple init calls from replicator driver Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 15/20] coresight: allow funnel and replicator drivers to be built as modules Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 16/20] coresight: cti: add function to register cti associate ops Tingwei Zhang
2020-07-23 4:27 ` [PATCH v4 17/20] coresight: allow cti to be built as a module Tingwei Zhang
2020-07-23 4:28 ` [PATCH v4 18/20] coresight: tmc-etr: add function to register catu ops Tingwei Zhang
2020-07-23 4:28 ` [PATCH v4 19/20] coresight: allow catu drivers to be built as modules Tingwei Zhang
2020-07-23 4:28 ` [PATCH v4 20/20] coresight: allow the coresight core driver to be built as a module Tingwei Zhang
2020-07-23 11:03 ` [PATCH v4 00/20] coresight: allow to build coresight as modules Mike Leach
2020-07-24 0:37 ` Tingwei Zhang
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