From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3760CC433EC for ; Thu, 23 Jul 2020 14:27:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0589620771 for ; Thu, 23 Jul 2020 14:27:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iK1qYEeY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0589620771 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bZHpYQspehOU7Cl6WYGD2G2sksmyRzeckdWTX3kvvfA=; b=iK1qYEeYPHht2Gmlr9wC3yEAr P2TWMFBphNzGYJeA9rOyVSmpMIbFoaydNbhbLTKS7jDHgiMZgaJAOGl7V6iuMHngW8FqBq/lKWIEI 9vOOnOehM/r+V4qHDGBnLMYOaYMb9B3ro+rNBVT/9XwAudCj6Mabk+3MP9ydY21CcZN4gSxwb4ecR Xk1BzRHLAuKAMcvJXI4t0N1Jj58+tOP4OtCNpAzKpqmr7dAjaYgZ89cQ1O1jGImxwsbp3n0vMNIda elaJ3RaHL9LGSONtrquKonqOrV/zthZSg8Zho2PuUSgd8BhD3ZUEfjMdaGDssclpyK3TVeG1OElrw muX+mqK8Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jycB4-0006J7-Pk; Thu, 23 Jul 2020 14:26:30 +0000 Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=worktop.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1jycAz-0006IN-CG; Thu, 23 Jul 2020 14:26:25 +0000 Received: by worktop.programming.kicks-ass.net (Postfix, from userid 1000) id 5BE1A983422; Thu, 23 Jul 2020 16:26:23 +0200 (CEST) Date: Thu, 23 Jul 2020 16:26:23 +0200 From: Peter Zijlstra To: Thomas Gleixner Subject: Re: [PATCH v4 00/13] "Task_isolation" mode Message-ID: <20200723142623.GS5523@worktop.programming.kicks-ass.net> References: <04be044c1bcd76b7438b7563edc35383417f12c8.camel@marvell.com> <87imeextf3.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87imeextf3.fsf@nanos.tec.linutronix.de> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-arch@vger.kernel.org" , "catalin.marinas@arm.com" , Alex Belits , "frederic@kernel.org" , "linux-kernel@vger.kernel.org" , "rostedt@goodmis.org" , "mingo@kernel.org" , "netdev@vger.kernel.org" , Prasun Kapoor , "linux-api@vger.kernel.org" , "will@kernel.org" , "davem@davemloft.net" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 23, 2020 at 03:17:04PM +0200, Thomas Gleixner wrote: > 2) Instruction synchronization > > Trying to do instruction synchronization delayed is a clear recipe > for hard to diagnose failures. Just because it blew not up in your > face does not make it correct in any way. It's broken by design and > violates _all_ rules of safe instruction patching and introduces a > complete trainwreck in x86 NMI processing. > > If you really think that this is correct, then please have at least > the courtesy to come up with a detailed and precise argumentation > why this is a valid approach. > > While writing that up you surely will find out why it is not. So delaying the sync_core() IPIs for kernel text patching _might_ be possible, but it very much wants to be a separate patchset and not something hidden inside a 'gem' like this. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel