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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:45708) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1k0muA-0005VQ-G7; Wed, 29 Jul 2020 15:18:02 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1k0muA-0005kW-2U; Wed, 29 Jul 2020 15:18:02 +0100 Date: Wed, 29 Jul 2020 15:18:02 +0100 From: Russell King - ARM Linux admin To: Guillaume Tucker Subject: Re: [PATCH 2/3] ARM: l2c: update prefetch bits in L2X0_AUX_CTRL using DT value Message-ID: <20200729141801.GB1551@shell.armlinux.org.uk> References: <860eb8a1eed879e55daf960c96acdac514cbda93.1596028601.git.guillaume.tucker@collabora.com> <79a628daef56c2d542e379f550de21da4fe3c901.1596028601.git.guillaume.tucker@collabora.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <79a628daef56c2d542e379f550de21da4fe3c901.1596028601.git.guillaume.tucker@collabora.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200729_101806_507039_AB94AE2A X-CRM114-Status: GOOD ( 22.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , Kukjin Kim , kernel@collabora.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 29, 2020 at 02:47:32PM +0100, Guillaume Tucker wrote: > The L310_PREFETCH_CTRL register bits 28 and 29 to enable data and > instruction prefetch respectively can also be accessed via the > L2X0_AUX_CTRL register. They appear to be actually wired together in > hardware between the registers. Changing them in the prefetch > register only will get undone when restoring the aux control register > later on. For this reason, set these bits in both registers during > initialisation according to the DT attributes. How will that happen? We write the auxiliary control register before the prefetch control register, so the prefetch control register will take precedence. See l2c310_configure() - l2c_configure() writes the auxiliary control register, and the function writes the prefetch control register later. I think the real issue is that Exynos has been modifying the prefetch settings via its machine .aux_mask / .aux_val configuration, and the opposite is actually true: the prefetch control register values will overwrite the attempt to modify the auxiliary control values set through the machine .aux_mask/.aux_val. > > Fixes: ec3bd0e68a67 ("ARM: 8391/1: l2c: add options to overwrite prefetching behavior") > Signed-off-by: Guillaume Tucker > --- > arch/arm/mm/cache-l2x0.c | 16 ++++++++++++---- > 1 file changed, 12 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > index 12c26eb88afb..43d91bfd2360 100644 > --- a/arch/arm/mm/cache-l2x0.c > +++ b/arch/arm/mm/cache-l2x0.c > @@ -1249,20 +1249,28 @@ static void __init l2c310_of_parse(const struct device_node *np, > > ret = of_property_read_u32(np, "prefetch-data", &val); > if (ret == 0) { > - if (val) > + if (val) { > prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH; > - else > + *aux_val |= L310_PREFETCH_CTRL_DATA_PREFETCH; > + } else { > prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH; > + *aux_val &= ~L310_PREFETCH_CTRL_DATA_PREFETCH; > + } > + *aux_mask &= ~L310_PREFETCH_CTRL_DATA_PREFETCH; > } else if (ret != -EINVAL) { > pr_err("L2C-310 OF prefetch-data property value is missing\n"); > } > > ret = of_property_read_u32(np, "prefetch-instr", &val); > if (ret == 0) { > - if (val) > + if (val) { > prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH; > - else > + *aux_val |= L310_PREFETCH_CTRL_INSTR_PREFETCH; > + } else { > prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH; > + *aux_val &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH; > + } > + *aux_mask &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH; > } else if (ret != -EINVAL) { > pr_err("L2C-310 OF prefetch-instr property value is missing\n"); > } > -- > 2.20.1 > > -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel