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Fri, 07 Aug 2020 01:56:37 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 6FCB0C433A0; Fri, 7 Aug 2020 01:56:37 +0000 (UTC) Received: from codeaurora.org (unknown [180.166.53.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tingwei) by smtp.codeaurora.org (Postfix) with ESMTPSA id EC781C433C9; Fri, 7 Aug 2020 01:56:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org EC781C433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=tingweiz@codeaurora.org Date: Fri, 7 Aug 2020 09:56:27 +0800 From: Tingwei Zhang To: Suzuki K Poulose Subject: Re: [PATCH v7 11/25] coresight: etb: allow etb to be built as a module Message-ID: <20200807015627.GA31019@codeaurora.org> References: <20200805025458.2978-1-tingwei@codeaurora.org> <20200805025458.2978-12-tingwei@codeaurora.org> <02dab16e-521e-ad0e-ebf9-06450c117c98@arm.com> <20200806111923.GA31216@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200806_215658_356629_3175FE3A X-CRM114-Status: GOOD ( 27.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tsoni@codeaurora.org, saiprakash.ranjan@codeaurora.org, kim.phillips@arm.com, mathieu.poirier@linaro.org, alexander.shishkin@linux.intel.com, gregkh@linuxfoundation.org, coresight@lists.linaro.org, rdunlap@infradead.org, ykaukab@suse.de, linux@armlinux.org.uk, jinlmao@codeaurora.org, tingwei@codeaurora.org, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 06, 2020 at 10:56:57PM +0800, Suzuki K Poulose wrote: > On 08/06/2020 12:19 PM, Tingwei Zhang wrote: > >On Wed, Aug 05, 2020 at 11:43:36PM +0800, Suzuki K Poulose wrote: > >>On 08/05/2020 03:54 AM, Tingwei Zhang wrote: > >>>From: Kim Phillips > >>> > >>>Allow to build coresight-etb10 as a module, for ease of development. > >>> > >>>- Kconfig becomes a tristate, to allow =m > >>>- add an etb_remove function, for module unload > >>>- add a MODULE_DEVICE_TABLE for autoloading on boot > >>> > >>>Cc: Mathieu Poirier > >>>Cc: Leo Yan > >>>Cc: Alexander Shishkin > >>>Cc: Randy Dunlap > >>>Cc: Suzuki K Poulose > >>>Cc: Greg Kroah-Hartman > >>>Cc: Russell King > >>>Signed-off-by: Kim Phillips > >>>Signed-off-by: Tingwei Zhang > >>>Tested-by: Mike Leach > >> > >> > >>>--- > >>> drivers/hwtracing/coresight/Kconfig | 5 ++++- > >>> drivers/hwtracing/coresight/coresight-etb10.c | 20 ++++++++++++++++++- > >>> 2 files changed, 23 insertions(+), 2 deletions(-) > >>> > >>>diff --git a/drivers/hwtracing/coresight/Kconfig > >>>b/drivers/hwtracing/coresight/Kconfig > >>>index d6e107bbd30b..996d84a1edb8 100644 > >>>--- a/drivers/hwtracing/coresight/Kconfig > >>>+++ b/drivers/hwtracing/coresight/Kconfig > >>>@@ -57,13 +57,16 @@ config CORESIGHT_SINK_TPIU > >>> the on-board coresight memory can handle. > >>> > >>> config CORESIGHT_SINK_ETBV10 > >>>- bool "Coresight ETBv1.0 driver" > >>>+ tristate "Coresight ETBv1.0 driver" > >>> depends on CORESIGHT_LINKS_AND_SINKS > >>> help > >>> This enables support for the Embedded Trace Buffer version 1.0 > >>>driver > >>> that complies with the generic implementation of the component > >>>without > >>> special enhancement or added features. > >>> > >>>+ To compile this driver as a module, choose M here: the > >>>+ module will be called coresight-etb10. > >>>+ > >>> config CORESIGHT_SOURCE_ETM3X > >>> tristate "CoreSight Embedded Trace Macrocell 3.x driver" > >>> depends on !ARM64 > >>>diff --git a/drivers/hwtracing/coresight/coresight-etb10.c > >>>b/drivers/hwtracing/coresight/coresight-etb10.c > >>>index 04ee9cda988d..b40756497c9a 100644 > >>>--- a/drivers/hwtracing/coresight/coresight-etb10.c > >>>+++ b/drivers/hwtracing/coresight/coresight-etb10.c > >>>@@ -801,6 +801,16 @@ static int etb_probe(struct amba_device *adev, > >>>const > >>>struct amba_id *id) > >>> return ret; > >>> } > >>> > >>>+static int __exit etb_remove(struct amba_device *adev) > >>>+{ > >>>+ struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev); > >>>+ > >>>+ misc_deregister(&drvdata->miscdev); > >>>+ coresight_unregister(drvdata->csdev); > >>>+ > >>>+ return 0; > >>>+} > >>>+ > >> > >>I am worried about the dangling reference via the misc device to > >>the drvdata. Not sure, if we need to grab the reference the module > >>for each open fd on the misc device. The misc device infrastructure > >>doesn't seem to do any of this implicitly. This is something worth > >>checking. I will see if I can trigger this. > >> > > > >Misc device is one char device. cdev_get() is called in chrdev_open() > >to grab reference of module. Look like we are safe here. > > That is not the case, as the misc_device doesn't have any pointers to > who the owner is, that triggered my question. > > Actually, it is the misc_open() which holds a refcount on the > f_ops (which is etb_fops for etb10) owner, thus we are safe here. > You are correct. It's in fops_get(c->fops. > It may be a good idea to add this comment in etb_remove(), so that > we don't have to dig this again. > I'll add comment to etb_remove. Thanks, Tingwei > with that: > > Reviewed-by: Suzuki K Poulose > > Cheers > Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel