From: Crystal Guo <crystal.guo@mediatek.com>
To: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, yong.liang@mediatek.com,
stanley.chu@mediatek.com, srv_heupstream@mediatek.com,
seiya.wang@mediatek.com, linux-kernel@vger.kernel.org,
afd@ti.com, fan.chen@mediatek.com,
Crystal Guo <crystal.guo@mediatek.com>,
linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com,
linux-arm-kernel@lists.infradead.org
Subject: [v4, 2/4] dt-binding: reset-controller: ti: add 'mediatek, infra-reset' to compatible
Date: Mon, 17 Aug 2020 11:03:22 +0800 [thread overview]
Message-ID: <20200817030324.5690-3-crystal.guo@mediatek.com> (raw)
In-Reply-To: <20200817030324.5690-1-crystal.guo@mediatek.com>
The TI syscon reset controller provides a common reset management,
and is suitable for MTK SoCs. Add compatible 'mediatek,infra-reset',
which denotes to use ti reset-controller driver directly.
Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
---
Documentation/devicetree/bindings/reset/ti-syscon-reset.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
index ab041032339b..5a0e9365b51b 100644
--- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
+++ b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
@@ -25,6 +25,7 @@ Required properties:
"ti,k2l-pscrst"
"ti,k2hk-pscrst"
"ti,syscon-reset"
+ "mediatek,infra-reset", "ti,syscon-reset"
- #reset-cells : Should be 1. Please see the reset consumer node below
for usage details
- ti,reset-bits : Contains the reset control register information
--
2.18.0
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next prev parent reply other threads:[~2020-08-17 3:06 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 3:03 [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo
2020-08-17 3:03 ` [v4, 1/4] dt-binding: reset-controller: ti: add reset-duration-us property Crystal Guo
2020-08-25 17:42 ` Rob Herring
2020-08-26 11:09 ` [v4,1/4] " Crystal Guo
2020-08-17 3:03 ` Crystal Guo [this message]
2020-08-25 19:02 ` [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to compatible Rob Herring
2020-08-26 11:09 ` Crystal Guo
2020-09-02 23:25 ` Suman Anna
2020-09-08 18:49 ` Rob Herring
2020-09-09 15:10 ` Suman Anna
2020-09-09 18:20 ` Rob Herring
2020-08-17 3:03 ` [v4,3/4] reset-controller: ti: introduce a new reset handler Crystal Guo
2020-09-02 23:40 ` Suman Anna
2020-09-09 2:57 ` Crystal Guo
2020-09-09 15:39 ` Suman Anna
2020-09-11 2:42 ` Crystal Guo
2020-09-11 2:52 ` Suman Anna
2020-09-11 6:07 ` Crystal Guo
2020-09-11 14:26 ` Philipp Zabel
2020-09-11 14:44 ` Suman Anna
2020-09-14 14:00 ` Crystal Guo
2020-09-29 13:54 ` Crystal Guo
2020-08-17 3:03 ` [v4,4/4] arm64: dts: mt8192: add infracfg_rst node Crystal Guo
2020-09-02 23:29 ` Suman Anna
2020-09-08 13:26 ` Crystal Guo
2020-09-08 15:51 ` Suman Anna
[not found] ` <5065a23627a34212aa62df646dbf00ee@mtkmbs05n1.mediatek.inc>
2020-09-02 3:03 ` [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo
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