From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E91CC433DF for ; Mon, 17 Aug 2020 08:44:42 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 625D52072D for ; Mon, 17 Aug 2020 08:44:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="q2+l3kW9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 625D52072D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9nDopLliBT3IndXtCQvjokMnrA0+ZWizXPA38AKep6w=; b=q2+l3kW9d2qb4SMMiskw+mhuK ukUJv1OFoU7EMy3WvI4+v6UzhCmZLHroZxsFfSMCMSO+/AbUIcwmErE9yBGUHNCIbupvTFRKZTF1Y vazIEZQD6YYSoEoZRZvad3xTWqSNCl6har9Tym/DhqsS9DWGpEkYWtoJG0nwAhl7jnBD0qt05sBGL otyA7NNNeyr/fPcR769wUGAuGSJveMwQMudAFeNJNshSsIIGn7iVFQ/a131ArVvFblskyzT/BDlEu 4pXe7zOHhp+nzn61xoM5yUrgqYRn3JV9xnrlng3tAz/P96LEnuKdQ5BJXSydP4DqWxW5odF9KZI5T B3jWSKp5A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7aj4-0002mP-7F; Mon, 17 Aug 2020 08:42:42 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7aQe-0001HZ-2m for linux-arm-kernel@lists.infradead.org; Mon, 17 Aug 2020 08:23:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 23B3830E; Mon, 17 Aug 2020 01:23:34 -0700 (PDT) Received: from bogus (unknown [10.37.12.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EBBE03F6CF; Mon, 17 Aug 2020 01:23:31 -0700 (PDT) Date: Mon, 17 Aug 2020 09:23:25 +0100 From: Sudeep Holla To: Nobuhiro Iwamatsu Subject: Re: [PATCH 6/8] arm64: dts: visconti: Add device tree for TMPV7708 RM main board Message-ID: <20200817082325.GA7057@bogus> References: <20200817014632.595898-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20200817014632.595898-7-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200817014632.595898-7-nobuhiro1.iwamatsu@toshiba.co.jp> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200817_042340_356521_2A2C7DF5 X-CRM114-Status: GOOD ( 17.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, Catalin Marinas , Linus Walleij , yuji2.ishikawa@toshiba.co.jp, linux-gpio@vger.kernel.org, Rob Herring , Sudeep Holla , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 17, 2020 at 10:46:30AM +0900, Nobuhiro Iwamatsu wrote: > Add basic support for the Visconti TMPV7708 SoC peripherals - > - CPU > - CA53 x 4 and 2 cluster. > - not support PSCI, currently only spin-table is supported. Do you have plans to support PSCI in future ? It is now almost more than 5 year old specification. So they should be strong reason for not supporting that. [..] > diff --git a/arch/arm64/boot/dts/toshiba/Makefile b/arch/arm64/boot/dts/toshiba/Makefile > new file mode 100644 > index 000000000000..8cd460d5b68e > --- /dev/null > +++ b/arch/arm64/boot/dts/toshiba/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > new file mode 100644 > index 000000000000..a883d3ab1858 > --- /dev/null > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > @@ -0,0 +1,44 @@ [..] > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + always-on; Will this be true when CPU is in low power modes ? -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel