From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 570E5C433E1 for ; Sat, 22 Aug 2020 23:07:33 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23A45206B5 for ; Sat, 22 Aug 2020 23:07:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Z/rYsK/d"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VY/TWFNJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 23A45206B5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RvFAgMwUSld+HIKR+V5MvRrfIiYgeNe3oqaMagC7k9U=; b=Z/rYsK/dhOcl8wZP+YR2nB4Et uj2f5OXCK18VJTiVdJZ2koF0/6pUzOHNsl8P2qayDsyry+nT8XzK9093VZlh7W0o2/ULQPl9tgM3l 7iwINrRcRV6H8GTzJlayfb3LpfUYebwTJz2IXuZxBkXfLn1wIA9FEm3yD1X4eZ0zieLNCF56Epnea yW1G8307J+X/DhZg/H2HemhiYOipU1P6cPef+rmmciVNumnb9+2ZQToqCrl1PfHLQedlp3z6YnidO eRCyoYGEUolvqNXMinpyk354zWzrpIl+SI60N5uVmk8UReZG8b8wrgS4+7TisVtnuv2MjPxkGg+yT sKQHiFeiQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k9cZf-0004ax-6h; Sat, 22 Aug 2020 23:05:23 +0000 Received: from mail-ed1-x542.google.com ([2a00:1450:4864:20::542]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k9cZb-0004Zz-FF; Sat, 22 Aug 2020 23:05:21 +0000 Received: by mail-ed1-x542.google.com with SMTP id l23so4950798edv.11; Sat, 22 Aug 2020 16:05:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=2Fpwogtsb8NGet/9oeWKnkv+ON3vD5cWlFlPhK4b0pk=; b=VY/TWFNJYwEBGSFmB855o1i9sz1IzgZKm3lUxnLXUie8J/srUwF+A0uaE3cPaylP+2 qJ5XB6qMdiGbkgiapFi1+HzxVhrz8noLOVTykooRgf/xsUrvbAIoXLyeb759/eNmJgci agVVK1j5RR/60xocQJyUU+m/RqtlI+cCUz1e7R2Z1No0lHA/HKLxr/Y4/nlQ6+snV0T8 FMer8eq3bYpIr0eQEgL97J/bswbGK4HUvf03Z31PomdqKBLlYU0f3OJ42mA2g7HQ8xX9 DlS0AYYGQGDHRy7ageKAbX1+o3Wk7iGHnsmYjjAbqOPQsMU0jnO8/aOf+ptmgeN50nlJ Vxnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=2Fpwogtsb8NGet/9oeWKnkv+ON3vD5cWlFlPhK4b0pk=; b=Am2xuLqUaQrDJ+BZ7NPCafWiG+Ds4a3KjQjOL5+ybocf+ArF+ks8EYhDMoDyVEFTLi +e61m5mZnLLy2SPcarJGhTajVrmv51EkbIxeOjlnGeKr3jEHTS1BZEf/IVphb1B2XdBM HuXN+om3hqIH4yAPib5lo4TPTgs8P9bL5MA0VH9Uh5tOtQo+ZleEUOanDVvXVpg2yUam lJ17zQWdzaIKhFpbkUyq0G+p+LMVGYDWzanJzE40np8EKuLNEKLUns+UKxsmprrV1wy0 l2T5iXCDV7ZO857FEVGU4EDXO8LLZud8etmmD8Lw12VtCoJr/ezhaUCfcRFFa5uIq8y8 vCaw== X-Gm-Message-State: AOAM531LdhV8WjHwDZRPXCBo2osf5cq1c68j47PNHH6L6+pav2Jcns2s L6di+r0Q67657ThIMDyzusPbRvK2vWYV8g== X-Google-Smtp-Source: ABdhPJzjZpBkLXFOtvZZoBfrQJVlw0sie6RZD0ECwJErzc05Hv0HcFVAw0DamE6gu+iZizm2xo0GAg== X-Received: by 2002:a05:6402:168c:: with SMTP id a12mr3199388edv.275.1598137516401; Sat, 22 Aug 2020 16:05:16 -0700 (PDT) Received: from BV030612LT ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id z10sm4195099eje.122.2020.08.22.16.05.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Aug 2020 16:05:15 -0700 (PDT) Date: Sun, 23 Aug 2020 02:05:13 +0300 From: Cristian Ciocaltea To: Manivannan Sadhasivam Subject: Re: [PATCH v5 0/3] Add Actions Semi Owl family sirq support Message-ID: <20200822230513.GA2260050@BV030612LT> References: <20200822131712.GB5954@Mani-XPS-13-9360> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200822131712.GB5954@Mani-XPS-13-9360> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200822_190519_530995_3374F87B X-CRM114-Status: GOOD ( 37.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Marc Zyngier , linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Thomas Gleixner , Andreas =?iso-8859-1?Q?F=E4rber?= , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mani, On Sat, Aug 22, 2020 at 06:47:12PM +0530, Manivannan Sadhasivam wrote: > Hi Cristi, > > On Wed, Aug 19, 2020 at 07:37:55PM +0300, Cristian Ciocaltea wrote: > > This patch series adds support for the external interrupt controller > > (SIRQ) found in the Actions Semi Owl family of SoC's (S500, S700 and > > S900). The controller handles up to 3 external interrupt lines through > > dedicated SIRQ pins. > > > > This is a rework of the patch series submitted some time ago by > > Parthiban Nallathambi: > > https://lore.kernel.org/lkml/20181126100356.2840578-1-pn@denx.de/ > > > > You need to preserve the authorship while reposting the patches. If you'd > like to take the authorship intentionally then please explain the reason in > cover letter. > > Thanks, > Mani Thanks for pointing this out, I was not aware of the procedure - this is actually my very first repost. Could you please indicate how should I proceed to fix this? I had absolutely no intention to take the authorship.. Sorry for the mistake, Cristi > > Please note I have dropped, for the moment, the S700 related patches > > since I do not own a compatible hardware for testing. I'm using instead > > an S500 SoC based board for which I have already provided the initial > > support: > > https://lore.kernel.org/lkml/cover.1592123160.git.cristian.ciocaltea@gmail.com/ > > > > The SIRQ controller support is a prerequisite of the soon to be submitted > > MFD driver for the Actions Semi ATC260x PMICs. > > > > Thanks and regards, > > Cristi > > > > Changes in v5: > > - Integrated Marc's review (more details in the driver patch changelog) > > - Rebased patch series on v5.9-rc1 > > > > Changes in v4: > > - Simplified the DTS structure: > > * dropped 'actions,sirq-shared-reg' node, now the differentiation > > between SoC variants is handled now via the compatible property > > * dropped 'actions,sirq-reg-offset', now controller base address in > > DTS points to SIRQ0 register, so no additional information is > > required for S500 and S700, while for S900 SoC the offsets of SIRQ1 > > and SIRQ2 regs are provided by the driver > > * 'actions,ext-irq-range' was replaced with 'actions,ext-interrupts', > > an array of the GIC interrupts triggered by the controller > > - Fixed wrong INTC_EXTCTL_TYPE_MASK definition > > - Removed redundant irq_fwspec checks in owl_sirq_domain_alloc() > > - Improved error handling in owl_sirq_of_init() > > - Added yaml binding document > > - Dropped S700 related DTS patches for lack of testing hardware: > > * arm64: dts: actions: Add sirq node for Actions Semi S700 > > * arm64: dts: actions: s700-cubieboard7: Enable SIRQ > > - Updated MAINTAINERS > > - Rebased patchset on kernel v5.8 > > - Cosmetic changes > > * Ordered include statements alphabetically > > * Added comment to owl_sirq_set_type() describing conversion of falling > > edge or active low signals > > * Replaced IRQF_TRIGGER_* with corresponding IRQ_TYPE_* variants > > * Ensured data types and function naming are consistent regarding the > > 'owl_sirq' prefix > > > > Changes in v3 (Parthiban Nallathambi): > > - Set default operating frequency to 24MHz > > - Falling edge and Low Level interrupts translated to rising edge and high level > > - Introduced common function with lock handling for register read and write > > - Used direct GIC interrupt number for interrupt local hwirq and finding offset > > using DT entry (range) when registers are shared > > - Changed irq_ack to irq_eoi > > - Added translation method for irq_domain_ops > > - Clearing interrupt pending based on bitmask for edge triggered > > - Added pinctrl definition for sirq for cubieboard7. This depends on, > > https://lore.kernel.org/patchwork/patch/1012859/ > > > > Changes in v2 (Parthiban Nallathambi): > > - Added SIRQ as hierarchical chip > > GIC <----> SIRQ <----> External interrupt controller/Child devices > > - Device binding updates with vendor prefix > > - Register sharing handled globally and common init sequence/data for all > > actions SoC family > > > > Cristian Ciocaltea (3): > > dt-bindings: interrupt-controller: Add Actions SIRQ controller binding > > irqchip: Add Actions Semi Owl SIRQ controller > > MAINTAINERS: Add entries for Actions Semi Owl SIRQ controller > > > > .../actions,owl-sirq.yaml | 68 ++++ > > MAINTAINERS | 2 + > > drivers/irqchip/Makefile | 1 + > > drivers/irqchip/irq-owl-sirq.c | 347 ++++++++++++++++++ > > 4 files changed, 418 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml > > create mode 100644 drivers/irqchip/irq-owl-sirq.c > > > > -- > > 2.28.0 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel