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Tue, 8 Sep 2020 07:30:13 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 8 Sep 2020 07:30:13 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 8 Sep 2020 07:30:13 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 088CUD5e031056; Tue, 8 Sep 2020 07:30:13 -0500 Date: Tue, 8 Sep 2020 07:30:13 -0500 From: Nishanth Menon To: Roger Quadros Subject: Re: [PATCH v2 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Message-ID: <20200908123013.jvim7rlokzvxdpse@akan> References: <20200907145213.30788-1-rogerq@ti.com> <20200907145213.30788-3-rogerq@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200907145213.30788-3-rogerq@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200908_083016_361660_F8F7B87C X-CRM114-Status: GOOD ( 15.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, kishon@ti.com, t-kristo@ti.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 17:52-20200907, Roger Quadros wrote: > The SERDES lane control mux registers are present in the > CTRLMMR space. > > Signed-off-by: Roger Quadros > --- > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > index 1702ac0bbf40..e72c7a0ccad5 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > @@ -18,6 +18,21 @@ > }; > }; > > + scm_conf: scm-conf@100000 { > + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > + reg = <0 0x00100000 0 0x1c000>; Just to stay consistent with j7200 stuff we are trying to keep clean: reg = <0x00 0x00100000 0x00 0x1c000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x00100000 0x1c000>; ranges = <0x00 0x00 0x00100000 0x1c000>; > + > + serdes_ln_ctrl: serdes-ln-ctrl@4080 { > + compatible = "mmio-mux"; > + #mux-control-cells = <1>; > + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ > + <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ > + }; > + }; > + > gic500: interrupt-controller@1800000 { > compatible = "arm,gic-v3"; > #address-cells = <2>; > -- > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel