From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D9ECC433E2 for ; Tue, 8 Sep 2020 14:52:23 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9FCAB2074D for ; Tue, 8 Sep 2020 14:52:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Mv9ZrAIB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9FCAB2074D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zf63rfzKeOAQSkZOT+bXJIli8DO+jDhgK64HMnYoMzI=; b=Mv9ZrAIBt+uQTftAcdZOYNujj P33yyycZnXOqf+dA20SGSTQxjaSXrUyyRAaJVjDLDI2Kwk5UkaWn3xpkmRz9FBWj/vldNkGqimwiR fDUF268Y9Hr7iQg54hjzQJk7phCqOHh36KNxdD6E6mYsgYkMXfbqzziYrrtooMNmFRk5V/WYXbE6q AdRH3egTXjE662I8NZ8LDWQ5l0wVhw5hjLt6RkarrK0JaL7Dqbjwm0bcTgG+M7PuXoss7EvzFR//R /fq76LJYKPBFslMwxKe/G5ZJUpOcnXhIxYD6VDG1DcZjQ+g/C1r6Tkofu9sHV4YJa9UoZ6jpMVUrW Aw07cdPVQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kFex3-0004An-LD; Tue, 08 Sep 2020 14:50:29 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kFex0-0004A1-HO for linux-arm-kernel@lists.infradead.org; Tue, 08 Sep 2020 14:50:27 +0000 Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8D4D522B49; Tue, 8 Sep 2020 14:50:22 +0000 (UTC) Date: Tue, 8 Sep 2020 15:50:20 +0100 From: Catalin Marinas To: Andrey Konovalov Subject: Re: [PATCH 20/35] arm64: mte: Add in-kernel MTE helpers Message-ID: <20200908145019.GH25591@gaia> References: <2cf260bdc20793419e32240d2a3e692b0adf1f80.1597425745.git.andreyknvl@google.com> <20200827093808.GB29264@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200908_105026_686022_2ADBBAD4 X-CRM114-Status: GOOD ( 26.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux ARM , Marco Elver , Elena Petrova , Kevin Brodsky , Will Deacon , Branislav Rankov , kasan-dev , LKML , Linux Memory Management List , Alexander Potapenko , Evgenii Stepanov , Andrey Ryabinin , Andrew Morton , Vincenzo Frascino , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 08, 2020 at 03:23:20PM +0200, Andrey Konovalov wrote: > On Thu, Aug 27, 2020 at 11:38 AM Catalin Marinas > wrote: > > On Fri, Aug 14, 2020 at 07:27:02PM +0200, Andrey Konovalov wrote: > > > diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h > > > index 1c99fcadb58c..733be1cb5c95 100644 > > > --- a/arch/arm64/include/asm/mte.h > > > +++ b/arch/arm64/include/asm/mte.h > > > @@ -5,14 +5,19 @@ > > > #ifndef __ASM_MTE_H > > > #define __ASM_MTE_H > > > > > > -#define MTE_GRANULE_SIZE UL(16) > > > +#include > > > > So the reason for this move is to include it in asm/cache.h. Fine by > > me but... > > > > > #define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) > > > #define MTE_TAG_SHIFT 56 > > > #define MTE_TAG_SIZE 4 > > > +#define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) > > > +#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT) > > > > ... I'd rather move all these definitions in a file with a more > > meaningful name like mte-def.h. The _asm implies being meant for .S > > files inclusion which isn't the case. > > > > > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > > > index eb39504e390a..e2d708b4583d 100644 > > > --- a/arch/arm64/kernel/mte.c > > > +++ b/arch/arm64/kernel/mte.c > > > @@ -72,6 +74,47 @@ int memcmp_pages(struct page *page1, struct page *page2) > > > return ret; > > > } > > > > > > +u8 mte_get_mem_tag(void *addr) > > > +{ > > > + if (system_supports_mte()) > > > + addr = mte_assign_valid_ptr_tag(addr); > > > > The mte_assign_valid_ptr_tag() is slightly misleading. All it does is > > read the allocation tag from memory. > > > > I also think this should be inline asm, possibly using alternatives. > > It's just an LDG instruction (and it saves us from having to invent a > > better function name). > > Could you point me to an example of inline asm with alternatives if > there's any? I see alternative_if and other similar macros used in > arch/arm64/ code, is that what you mean? Those seem to always use > static conditions, like config values, but here we have a dynamic > system_supports_mte(). Could you elaborate on how I should implement > this? There are plenty of ALTERNATIVE macro uses under arch/arm64, see arch/arm64/include/asm/alternative.h for the definition and some simple documentation. In this case, something like (untested, haven't even checked whether it matches the mte_assign_valid_ptr_tag() code): asm(ALTERNATIVE("orr %0, %1, #0xff << 56", "ldg %0, [%1]", ARM64_HAS_MTE)); -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel