From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EFB8C433E2 for ; Thu, 10 Sep 2020 16:22:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C7E9E2075A for ; Thu, 10 Sep 2020 16:22:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="1orKgMUx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C7E9E2075A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=D48wyy6d90x6SjVhvKwbYMfu3QF7Czs2orXfQuPPVO8=; b=1orKgMUxP+9+jaD3KDGYrv9iF 7E3jMvBGF0UuzdwUQOVWTLiGt17lTG7B14WqJsGjpyJzsjtKJvaxm5zqSk+McpZnEnhD8SLFlQVUg dQuP3386++j6v+pDNVNH8D2hxkvEWkGUdcZplaU1y9W0gA2gmAg8st1ocXnlvWgCIhR0iwOsy6dXA ZYwmCb7ZTBF8Snx78e/jpDZV6mzyu2jacYmTiJJGczJfzN3LcX+EoroTcnVXvfYCSJ18DZnjN7EzA 3IEqDVjwMX8JDaGKLi3g8dKRdKauAHR7PsNcxWJGYpJslHIthXTSkGV9NNm1FLxsaQysaTUzFw32Q 6TPLFgDWg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGPJo-00049g-Ur; Thu, 10 Sep 2020 16:21:05 +0000 Received: from mail-il1-f195.google.com ([209.85.166.195]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGPJm-00048Y-5W; Thu, 10 Sep 2020 16:21:03 +0000 Received: by mail-il1-f195.google.com with SMTP id y2so6217057ilp.7; Thu, 10 Sep 2020 09:21:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=WFYcr99e9oKRQQf7M3oV3UjkunbVdfv+xqARYc/QMwo=; b=aRwW7GIuJAsnV/Wyqm2fd0Bgzvh7uA7hlLAo5famxmnVrjcqklKTm9DeMPm4T+dAKH bbAwGzAQ1eUIlzMJ1HOG/bCvqpACm+Exw72dD8FzWFvAfoWWl9UN7Japr0qaSLl0S6VR pT3IDS7ajBEqfb49BuN1xKxdtI8CQ9O4PETIMYnvwQzOkIxnACCdMsbILey6nh2nGAGl LmJRfBOIFs3xJkplZUvFXtbfxT38JULg/ylw/6gYz9EHSAfoQuhz6gLpAOj0BLDG2DYj O2oolBytvdF77KtpCr4GrKBh+j9yhJEdl2r75PCjI/RNK0+cXFHy+8uYzQvFF2SdnkL/ 4/YQ== X-Gm-Message-State: AOAM530F3s/0jP7JsPICNsiZkEuYN2xlpsJg0Ni2sKuIT4+HgbGrsquz hcdjTam6kpF+sSU5MsscXg== X-Google-Smtp-Source: ABdhPJyw+1I4LioOUAOgnWPGmGnsnWzBAy+MSWJLjUW62/qg+HPmpMSUN5zvFwwn5q5yTRgSBSJzBw== X-Received: by 2002:a05:6e02:be6:: with SMTP id d6mr8553154ilu.76.1599754861486; Thu, 10 Sep 2020 09:21:01 -0700 (PDT) Received: from xps15 ([64.188.179.251]) by smtp.gmail.com with ESMTPSA id z26sm3385107ilf.60.2020.09.10.09.20.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 09:21:00 -0700 (PDT) Received: (nullmailer pid 471343 invoked by uid 1000); Thu, 10 Sep 2020 16:20:59 -0000 Date: Thu, 10 Sep 2020 10:20:59 -0600 From: Rob Herring To: Jim Quinlan Subject: Re: [PATCH v11 09/11] PCI: brcmstb: Accommodate MSI for older chips Message-ID: <20200910162059.GA471185@bogus> References: <20200824193036.6033-1-james.quinlan@broadcom.com> <20200824193036.6033-10-james.quinlan@broadcom.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200824193036.6033-10-james.quinlan@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_122102_298448_64EBF6F6 X-CRM114-Status: GOOD ( 12.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Florian Fainelli , linux-pci@vger.kernel.org, open list , Lorenzo Pieralisi , bcm-kernel-feedback-list@broadcom.com, "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , Bjorn Helgaas , Robin Murphy , Christoph Hellwig , Nicolas Saenz Julienne , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 24 Aug 2020 15:30:22 -0400, Jim Quinlan wrote: > From: Jim Quinlan > > Older BrcmSTB chips do not have a separate register for MSI interrupts; the > MSIs are in a register that also contains unrelated interrupts. In > addition, the interrupts lie in bits [31..24] for these legacy chips. This > commit provides common code for both legacy and non-legacy MSI interrupt > registers. > > Signed-off-by: Jim Quinlan > Acked-by: Florian Fainelli > --- > drivers/pci/controller/pcie-brcmstb.c | 71 +++++++++++++++++++-------- > 1 file changed, 50 insertions(+), 21 deletions(-) > Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel