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From: Catalin Marinas <catalin.marinas@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH v5 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412
Date: Fri, 11 Sep 2020 11:37:14 +0100	[thread overview]
Message-ID: <20200911103714.GA4094@gaia> (raw)
In-Reply-To: <20200909231310.3297400-2-robh@kernel.org>

On Wed, Sep 09, 2020 at 05:13:10PM -0600, Rob Herring wrote:
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 554a7e8ecb07..55dfff8ca466 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -943,6 +943,7 @@
>  
>  #include <linux/build_bug.h>
>  #include <linux/types.h>
> +#include <asm/alternative.h>
>  
>  #define __DEFINE_MRS_MSR_S_REGNUM				\
>  "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \
> @@ -1024,6 +1025,17 @@
>  		write_sysreg(__scs_new, sysreg);			\
>  } while (0)
>  
> +#define read_sysreg_par() ({						\
> +	unsigned long flags;						\
> +	u64 par;							\
> +	local_irq_save(flags);						\
> +	asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));	\
> +	par = read_sysreg(par_el1);					\
> +	asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));	\
> +	local_irq_restore(flags);					\
> +	par;								\
> +})

As an alternative to local_irq_save/restore, we could have added a dmb
in the kernel_exit macro. The minor nit here is that we always disable
interrupts even when the erratum doesn't apply.

The EL1 code accessing PAR_EL1 already runs with interrupts disabled
(which covers the prior AT instruction). If that's the case for KVM as
well, we could drop the local_irq_* entirely and just leave the DMB in
the exit to guest code.

-- 
Catalin

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  reply	other threads:[~2020-09-11 10:38 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09 23:13 [PATCH v5 1/2] arm64: Add part number for Arm Cortex-A77 Rob Herring
2020-09-09 23:13 ` [PATCH v5 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412 Rob Herring
2020-09-11 10:37   ` Catalin Marinas [this message]
2020-09-11 15:28     ` Will Deacon
2020-09-11 15:41       ` Catalin Marinas

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